diff options
| author | Mulin Chao <mlchao@nuvoton.com> | 2017-04-19 15:06:17 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-04-25 01:45:37 -0700 |
| commit | bd5dee115c0dac74ee730d7d925d302fec1c5e68 (patch) | |
| tree | 6c942d7bcf325cd67fb1c8f57a17f09694a6a0b6 /include/gpio.h | |
| parent | 9cd1dcc3fd581100d28444c087f3df0ca8a8e0d6 (diff) | |
| download | chrome-ec-bd5dee115c0dac74ee730d7d925d302fec1c5e68.tar.gz | |
npcx: gpio: Add support for npcx7 series ec.
This CL includes:
1. Add gpio_chip-npcx5/7.h files and move all macro functions
related to chip family to them. (Move wui macro func from
gpio_wui.h to them.)
2. Replace alternative and low-voltage mapping table with macro
function NPCX_ALT_TABLE and NPCX_LVOL_TABLE.
3. Add UART wakeup mechanism in __gpio_wk1h_interrupt() ISR.
4. Add gpio register definitions of npcx7 family in registers.h.
5. Add GPIO_LOCKED flag for lock functionality.
BRANCH=none
BUG=none
TEST=No build errors for all boards using npcx5 series (besides gru).
Build poppy board and upload FW to platform. No issues found.
Passed validation for all GPIO functionalities on npcx5m6g
and npcx796f evb.
Change-Id: I60c30ce223629a0d8cb767a54a0a9b02a69de9c5
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/481561
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'include/gpio.h')
| -rw-r--r-- | include/gpio.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/gpio.h b/include/gpio.h index 919c7c8c80..8e6fd19444 100644 --- a/include/gpio.h +++ b/include/gpio.h @@ -31,6 +31,7 @@ #define GPIO_INT_SHARED (1 << 15) /* Shared among multiple pins */ #define GPIO_SEL_1P8V (1 << 16) /* Support 1.8v */ #define GPIO_ALTERNATE (1 << 17) /* GPIO used for alternate function. */ +#define GPIO_LOCKED (1 << 18) /* Lock GPIO output and configuration */ /* Common flag combinations */ #define GPIO_OUT_LOW (GPIO_OUTPUT | GPIO_LOW) |