diff options
| author | Mary Ruthven <mruthven@chromium.org> | 2017-06-05 20:24:10 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-02-07 08:01:00 +0000 |
| commit | eb1d3ad5e8d77e9a925268ce048a27b6aea9da9e (patch) | |
| tree | b73401e183b4b312166debe2f5f50fa351adcaf9 /include/gpio.h | |
| parent | e61202c800686ca441c03d8f2e6f75de94e6222d (diff) | |
| download | chrome-ec-eb1d3ad5e8d77e9a925268ce048a27b6aea9da9e.tar.gz | |
g: add gpio_set_wakepin() to configure wake pins
Cr50 needs a cleaner way to enable and disable wakepins. This change
adds gpio_set_wakepin() to enable the wake pin or disable.
The gpio_set_flags() or gpio_set_flags_by_mask() remain unaffecting
wake-pin configuration.
This patch increases the flash usage by 16 bytes.
BUG=b:35587259
BRANCH=cr50
TEST=verify pinmux has the same output before and after the change on
octopus.
Change-Id: I0387c673aedc046ce9cf6b5f0d683c40f3079281
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/533674
Tested-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
Commit-Queue: Namyoon Woo <namyoon@chromium.org>
Diffstat (limited to 'include/gpio.h')
| -rw-r--r-- | include/gpio.h | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/include/gpio.h b/include/gpio.h index 61329ad758..e1957813e0 100644 --- a/include/gpio.h +++ b/include/gpio.h @@ -34,9 +34,12 @@ #define GPIO_SEL_1P8V BIT(16) /* Support 1.8v */ #define GPIO_ALTERNATE BIT(17) /* GPIO used for alternate function. */ #define GPIO_LOCKED BIT(18) /* Lock GPIO output and configuration */ -#define GPIO_HIB_WAKE_HIGH BIT(19) /* Hibernate wake on high level */ +#define GPIO_HIB_WAKE_HIGH BIT(19) /* Hibernate wake on high level */ +#define GPIO_HIB_WAKE_LOW BIT(20) /* Hibernate wake on low level */ +#define GPIO_HIB_WAKE_RISING BIT(21) /* Hibernate wake on rising edge */ +#define GPIO_HIB_WAKE_FALLING BIT(22) /* Hibernate wake on falling edge */ #ifdef CONFIG_GPIO_POWER_DOWN -#define GPIO_POWER_DOWN BIT(20) /* Pin and pad is powered off */ +#define GPIO_POWER_DOWN BIT(23) /* Pin and pad is powered off */ #endif /* Common flag combinations */ @@ -53,6 +56,8 @@ #define GPIO_INT_LEVEL (GPIO_INT_LOW | GPIO_INT_HIGH) #define GPIO_INT_ANY (GPIO_INT_BOTH | GPIO_INT_LEVEL) #define GPIO_INT_BOTH_DSLEEP (GPIO_INT_BOTH | GPIO_INT_DSLEEP) +#define GPIO_HIB_WAKE_MASK (GPIO_HIB_WAKE_HIGH | GPIO_HIB_WAKE_LOW | \ + GPIO_HIB_WAKE_RISING|GPIO_HIB_WAKE_FALLING) /* Convert GPIO mask to GPIO number / index. */ #define GPIO_MASK_TO_NUM(mask) (__fls(mask)) @@ -343,4 +348,15 @@ int gpio_power_down_module(enum module_id id); */ int signal_is_gpio(int signal); +/** + * Configure a GPIO as wake source on a given condition and enable it, or + * disable it. + * + * @param signal GPIO to enable to wake Cr50 up + * @param flags Wake condition. Should be one among + * GPIO_HIB_WAKE_{HIGH, LOW, RISING, FALLING} to enable it + * as a wake pin. 0 to disable it. + */ +void gpio_set_wakepin(enum gpio_signal signal, uint32_t flags); + #endif /* __CROS_EC_GPIO_H */ |