diff options
author | Furquan Shaikh <furquan@google.com> | 2019-06-03 19:08:42 -0700 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2019-06-05 21:13:50 +0000 |
commit | 184701a33a0f77dfbe38d231d05741db1f8ddbc6 (patch) | |
tree | b1dcb55ef110c1d2922c9d22b263f0629060330c /include/i8042_protocol.h | |
parent | e0f6c91881b2873a415d9debaf381dfada771629 (diff) | |
download | chrome-ec-184701a33a0f77dfbe38d231d05741db1f8ddbc6.tar.gz |
8042: Only send back ACK in response to reset command(0xff)
8042 keyboard command reset (0xff) was returning ACK(0xfa) as well as
BAT(0xaa). From [1], 0xaa seems to be represent OK. However, the spec
does not expect OK to be sent in response to reset command.
Coreboot libpayload 8042 driver was recently updated to send a reset
command on initialization to make it work with certain
payloads. Sending back 0xaa along with ACK seems to make the
initialization fail because it is not expecting anything other than
ACK.
This change gets rid of the return value 0xaa that was being sent for
reset command.
[1] http://zet.aluzina.org/images/d/d4/8042.pdf
BUG=b:134366527
BRANCH=None
TEST=Verified that keyboard initialization no longer fails in
depthcharge.
Change-Id: I0ac917dc94aa381ab705474cd7bcf494fb8b10d6
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1641756
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Reviewed-by: Duncan Laurie <dlaurie@google.com>
Tested-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Diffstat (limited to 'include/i8042_protocol.h')
-rw-r--r-- | include/i8042_protocol.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/include/i8042_protocol.h b/include/i8042_protocol.h index 8844cd658d..d6b47db458 100644 --- a/include/i8042_protocol.h +++ b/include/i8042_protocol.h @@ -33,7 +33,7 @@ #define I8042_CMD_SET_A_KEY_T 0xfb #define I8042_CMD_SET_A_KEY_MR 0xfc #define I8042_CMD_SET_A_KEY_M 0xfd -#define I8042_CMD_RESET_BAT 0xff +#define I8042_CMD_RESET 0xff #define I8042_CMD_RESEND 0xfe /* port 0x64 */ @@ -66,7 +66,6 @@ #define I8042_PULSE_END 0xff /* port 0x60 return value */ -#define I8042_RET_BAT 0xaa #define I8042_RET_EMUL0 0xe0 #define I8042_RET_EMUL1 0xe1 #define I8042_RET_ECHO 0xee |