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authorVijay Hiremath <vijay.p.hiremath@intel.com>2016-11-17 22:06:06 -0800
committerchrome-bot <chrome-bot@chromium.org>2017-01-21 10:03:45 -0800
commit44eb5829c6cc57e3448733abd2349de0cc562809 (patch)
tree8a9fd9af57aa31d4d435d7b40d045392f3c8f3c3 /include/lpc.h
parent8e4d4291726831cc35b3991418331db9a247a98b (diff)
downloadchrome-ec-44eb5829c6cc57e3448733abd2349de0cc562809.tar.gz
intel_x86: Make common code for LPC S0 <-> S0ix transitions
BUG=chrome-os-partner:59141 BRANCH=none TEST=Manually tested on Reef. System can enter and exit from S0iX when LID is closed & opened respectively. Change-Id: I5892da327c2dcdd400d5a7ade867bec1b80cbaa4 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/407047 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'include/lpc.h')
-rw-r--r--include/lpc.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/include/lpc.h b/include/lpc.h
index 4408b71327..03699dab35 100644
--- a/include/lpc.h
+++ b/include/lpc.h
@@ -124,7 +124,4 @@ void lpc_disable_acpi_interrupts(void);
/* Enable LPC ACPI interrupts */
void lpc_enable_acpi_interrupts(void);
-void lpc_enable_wake_mask_for_lid_open(void);
-
-void lpc_disable_wake_mask_for_lid_open(void);
#endif /* __CROS_EC_LPC_H */