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| author | Jack Rosenthal <jrosenth@chromium.org> | 2019-03-11 17:37:28 -0600 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-03-13 21:05:08 -0700 |
| commit | a898b6cc70e1a32494d474620e40076fa5741125 (patch) | |
| tree | e152defbb08fcdb3b138ecabaf160e808feea86e /include/panic.h | |
| parent | 88c5b086b2722b6f959f2608de298b3ba8299888 (diff) | |
| download | chrome-ec-a898b6cc70e1a32494d474620e40076fa5741125.tar.gz | |
minute-ia: Print panic info on processor exception
This adds appropriate x86 exception handlers to print helpful panic info
when a processor exception occurs. An example is shown below:
> rw 0xFFFFFFFF 0xDEADBEEF
write 0xffffffff = 0xdeadbeef
========== PANIC ==========
General Protection Fault
Error Code = 0xFF010000
EIP = 0xFF006363
CS = 0x00000008
EFLAGS = 0x00010202
EAX = 0x00000060
EBX = 0xDEADBEEF
ECX = 0xFF01519F
EDX = 0x00103085
ESI = 0xFF015280
EDI = 0xFFFFFFFF
Resetting system...
===========================
In addition, this fixes a bug with get_current_vector_number, causing it
to return 0x100 when ISR=0.
BUG=b:126691187,b:128444630
BRANCH=none
TEST=loaded onto arcada using ISH shim loader, used memory access and
divide by zero instructions to trigger a processor exception
Change-Id: Ibd58e6cb3a28b4d9cf3aa7bfb0f13d4f6fdbb77e
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1515949
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'include/panic.h')
| -rw-r--r-- | include/panic.h | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/include/panic.h b/include/panic.h index 1984081dd7..aeaa8f8024 100644 --- a/include/panic.h +++ b/include/panic.h @@ -41,6 +41,25 @@ struct nds32_n8_panic_data { uint32_t ipsw; }; +/* x86 registers saved on panic */ +struct x86_panic_data { + uint32_t vector; /* Exception vector number */ + + /* Data pushed when exception handler called */ + uint32_t error_code; + uint32_t eip; + uint32_t cs; + uint32_t eflags; + + /* General purpose registers */ + uint32_t eax; + uint32_t ebx; + uint32_t ecx; + uint32_t edx; + uint32_t esi; + uint32_t edi; +}; + /* Data saved across reboots */ struct panic_data { uint8_t arch; /* Architecture (PANIC_ARCH_*) */ @@ -52,6 +71,7 @@ struct panic_data { union { struct cortex_panic_data cm; /* Cortex-Mx registers */ struct nds32_n8_panic_data nds_n8; /* NDS32 N8 registers */ + struct x86_panic_data x86; /* Intel x86 */ }; /* @@ -66,6 +86,7 @@ struct panic_data { enum panic_arch { PANIC_ARCH_CORTEX_M = 1, /* Cortex-M architecture */ PANIC_ARCH_NDS32_N8 = 2, /* NDS32 N8 architecture */ + PANIC_ARCH_X86 = 3, /* Intel x86 */ }; /* |