ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ish

In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.

This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.

The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.

BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish

Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>

1 files changed, 0 insertions, 82 deletions

diff --git a/include/power/icelake.h b/include/power/icelake.h
deleted file mode 100644
index 08c14718ec..0000000000
--- a/include/power/icelake.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Icelake chipset power control module for Chrome EC */
-
-#ifndef __CROS_EC_ICELAKE_H
-#define __CROS_EC_ICELAKE_H
-
-#include "stdbool.h"
-
-/* Input state flags. */
-#define IN_PCH_SLP_S3_DEASSERTED  POWER_SIGNAL_MASK(X86_SLP_S3_DEASSERTED)
-#define IN_PCH_SLP_S4_DEASSERTED  POWER_SIGNAL_MASK(X86_SLP_S4_DEASSERTED)
-#define IN_PCH_SLP_SUS_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_SUS_DEASSERTED)
-
-#define IN_ALL_PM_SLP_DEASSERTED (IN_PCH_SLP_S3_DEASSERTED | \
-				  IN_PCH_SLP_S4_DEASSERTED | \
-				  IN_PCH_SLP_SUS_DEASSERTED)
-
-#define IN_PGOOD_ALL_CORE POWER_SIGNAL_MASK(X86_DSW_DPWROK)
-
-#define IN_ALL_S0 (IN_PGOOD_ALL_CORE | IN_ALL_PM_SLP_DEASSERTED)
-
-#define CHIPSET_G3S5_POWERUP_SIGNAL IN_PCH_SLP_SUS_DEASSERTED
-
-#define CHARGER_INITIALIZED_DELAY_MS 100
-#define CHARGER_INITIALIZED_TRIES 40
-
-/* Power signals list */
-enum power_signal {
-	X86_SLP_S0_DEASSERTED,
-	X86_SLP_S3_DEASSERTED,
-	X86_SLP_S4_DEASSERTED,
-	X86_SLP_SUS_DEASSERTED,
-	X86_RSMRST_L_PGOOD,
-	X86_DSW_DPWROK,
-	X86_ALL_SYS_PGOOD,
-
-	/* Number of X86 signals */
-	POWER_SIGNAL_COUNT
-};
-
-struct intel_x86_pwrok_signal {
-	enum gpio_signal gpio;
-	bool active_low;
-	int delay_ms;
-};
-
-/*
- * Ice Lake/Tiger Lake/Jasper Lake PWROK Generation
- *
- * The following signals are controlled based on the state of the ALL_SYS_PWRGD
- * signal
- *
- *	VCCIN enable (input to the VCCIN voltage rail controller)
- *	VCCST_PWRGD (input to the SoC)
- *	PCH_PWROK (input to the SoC)
- *	SYS_PWROK (input to the SoC)
- *
- * For any the above signals that are controlled by the EC, create an entry
- * in the pwrok_signal_assert_list[] and pwrok_signal_deassert_list[] arrays.
- * The typical order for asserting the signals is shown above, the deassert
- * order is the reverse.
- *
- * ALL_SYS_PWRGD indicates when all the following are asserted.
- *	RSMRST_PWRGD & DPWROK
- *	S4 voltage rails good (DDR)
- *	VCCST voltage rail good
- *	S0 voltage rails good
- *
- * ALL_SYS_PWRGD can be implemented as a single GPIO if the platform power logic
- * combines the above power good signals. Otherwise your board can override
- * intel_x86_get_pg_ec_all_sys_pwrgd() to check multiple power good signals.
- */
-extern const struct intel_x86_pwrok_signal pwrok_signal_assert_list[];
-extern const int pwrok_signal_assert_count;
-extern const struct intel_x86_pwrok_signal pwrok_signal_deassert_list[];
-extern const int pwrok_signal_deassert_count;
-
-#endif /* __CROS_EC_ICELAKE_H */