diff options
| author | Jack Rosenthal <jrosenth@chromium.org> | 2022-06-27 15:15:15 -0600 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-07-01 00:06:48 +0000 |
| commit | 7c223aa530a80f457248614358f3667bfaed2aee (patch) | |
| tree | 36fc04638606e98dce5ef366a85cd26a77803934 /include/pwm.h | |
| parent | b4a490046e08853374b79413aab499292967b324 (diff) | |
| download | chrome-ec-7c223aa530a80f457248614358f3667bfaed2aee.tar.gz | |
include/pwm.h: Format with clang-format
BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I7f38d79940af0d9676f88ec813b9fb5bf82f868a
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730393
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Diffstat (limited to 'include/pwm.h')
| -rw-r--r-- | include/pwm.h | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/include/pwm.h b/include/pwm.h index 401d3dc0ec..cda2b19014 100644 --- a/include/pwm.h +++ b/include/pwm.h @@ -39,34 +39,33 @@ void pwm_set_duty(enum pwm_channel ch, int percent); */ int pwm_get_duty(enum pwm_channel ch); - /* Flags for PWM config table */ /** * PWM output signal is inverted, so 100% duty means always low */ -#define PWM_CONFIG_ACTIVE_LOW BIT(0) +#define PWM_CONFIG_ACTIVE_LOW BIT(0) /** * PWM channel has a fan controller with a tach input and can auto-adjust * its duty cycle to produce a given fan RPM. */ -#define PWM_CONFIG_HAS_RPM_MODE BIT(1) +#define PWM_CONFIG_HAS_RPM_MODE BIT(1) /** * PWM clock select alternate source. The actual clock and alternate * source are chip dependent. */ -#define PWM_CONFIG_ALT_CLOCK BIT(2) +#define PWM_CONFIG_ALT_CLOCK BIT(2) /** * PWM channel has a complementary output signal which should be enabled in * addition to the primary output. */ -#define PWM_CONFIG_COMPLEMENTARY_OUTPUT BIT(3) +#define PWM_CONFIG_COMPLEMENTARY_OUTPUT BIT(3) /** * PWM channel must stay active in low-power idle, if enabled. */ -#define PWM_CONFIG_DSLEEP BIT(4) +#define PWM_CONFIG_DSLEEP BIT(4) /** * PWM channel's IO type is open-drain, if enabled. (default IO is push-pull.) */ -#define PWM_CONFIG_OPEN_DRAIN BIT(5) -#endif /* __CROS_EC_PWM_H */ +#define PWM_CONFIG_OPEN_DRAIN BIT(5) +#endif /* __CROS_EC_PWM_H */ |