nds32: use INT_MASK instead of GIE

When there is an interrupt event, N8 CPU will save PSW register to IPSW
register and clear GIE then jump to interrupt service routine. N8 will
restore PSW from IPSW after "iret" instruction (the above are purely
hardware mechanism).

Nested interrupt will occur if we set GIE again in interrupt context.

symptom:
    power button pressed while LID open -> exception or unknown reset.

Signed-off-by: Dino Li <dino.li@ite.com.tw>

BRANCH=none
BUG=none
TEST=1. Manually pressed power button x200.
     2. Console "eflash" erase and write eflash OK.

Change-Id: Ic04a23d473ebc6417dffea814a27583cb8d63a1f
Reviewed-on: https://chromium-review.googlesource.com/289437
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>

1 files changed, 12 insertions, 0 deletions

diff --git a/include/task.h b/include/task.h
index d7d6dd1ca3..ed635686bc 100644
--- a/include/task.h
+++ b/include/task.h
@@ -52,6 +52,18 @@ void interrupt_enable(void);
 inline int in_interrupt_context(void);
 
 /**
+ * Return current interrupt mask. Meaning is chip-specific and
+ * should not be examined; just pass it to set_int_mask() to
+ * restore a previous interrupt state after interrupt_disable().
+ */
+uint32_t get_int_mask(void);
+
+/**
+ * Set interrupt mask. As with interrupt_disable(), use with care.
+ */
+void set_int_mask(uint32_t val);
+
+/**
  * Set a task event.
  *
  * If the task is higher priority than the current task, this will cause an