diff options
author | Alec Berg <alecaberg@chromium.org> | 2015-07-21 15:52:45 -0700 |
---|---|---|
committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-07-22 18:04:36 +0000 |
commit | 642fa3f3bc0e1d8feb84ad653371959aacfae2db (patch) | |
tree | 1b0c9d109cb4d402a040eedaef5d87c831a4acd5 /include/usb_pd.h | |
parent | 0115834bb637f95c7bb0d9d882a09dd1c4349d15 (diff) | |
download | chrome-ec-642fa3f3bc0e1d8feb84ad653371959aacfae2db.tar.gz |
ryu: plankton: allow plankton to send VDM to enter CCD
Create new custom VDM to notify DUT to enter case closed
debugging mode. Send this VDM from Plankton when the case
closed debugging enable button is pressed. Once DUT
receives the CCD enable VDM, CCD remains enabled until
a reboot. Note, this is polarity dependent, so cable
might need to be flipped.
BUG=chrome-os-partner:42569
BRANCH=smaug
TEST=load on plankton and ryu. attach full feature C to C
cable (must have USB3.0 wires). make sure plankton is in
USB mode (USB_SS_USB_MODE light should be set, which can be
done by pressing DP_USB_TOGGLE button). Press CASE_CLOSE_EN
button to send VDM, and then attach micro-B to debug port
CN14 on plankton. See that VID/PID for Ryu show up in lsusb
on host, and EC console works. If device does not show up,
flip polarity of cable.
Change-Id: Ifa469e4a43e32089becd75fe6cdfe0ed462d950b
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/287441
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'include/usb_pd.h')
-rw-r--r-- | include/usb_pd.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/usb_pd.h b/include/usb_pd.h index 9fd95bac8d..b25eca3ebc 100644 --- a/include/usb_pd.h +++ b/include/usb_pd.h @@ -325,6 +325,7 @@ struct pd_policy { #define VDO_CMD_CURRENT VDO_CMD_VENDOR(11) #define VDO_CMD_FLIP VDO_CMD_VENDOR(12) #define VDO_CMD_GET_LOG VDO_CMD_VENDOR(13) +#define VDO_CMD_CCD_EN VDO_CMD_VENDOR(14) #define PD_VDO_VID(vdo) ((vdo) >> 16) #define PD_VDO_SVDM(vdo) (((vdo) >> 15) & 1) |