diff options
| author | Scott Collyer <scollyer@google.com> | 2018-03-16 09:44:32 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-03-20 19:30:17 -0700 |
| commit | 261afe62f30f0a259505b14ec1afcfb6fb1d781a (patch) | |
| tree | da3aacf1d6785da778d036784273532caa1ac96b /include/usbc_ppc.h | |
| parent | 699838c0c1b9222d2d01d1575be3519fa8e3b9ba (diff) | |
| download | chrome-ec-261afe62f30f0a259505b14ec1afcfb6fb1d781a.tar.gz | |
ppc: Add driver for NX20P3483
The NX20P3483 is a USB PD and Type C high voltage sink/source combo
switch. This CL adds support for this PPC variant. Unlike the TI
SN5S330, the NX20P3483 does not support VCONN and does not need to be
informed of CC polarity by the TCPM. To account for these differences,
2 new PPC config options are added and the driver for the TI SN5S330
was modified to include these new options.
The SNK/SRC switch mode for the NX20P3483 is controlled by 2 GPIO
signals which may be connected the EC or directly to the TCPC. To
handle both cases, the ppc_chips structure was modified with a flags,
snk_gpio, and src_gpio elements.
BUG=b:74206647
BRANCH=none
TEST=make -j buildall and verified there are no build errors.
Change-Id: Ic4415ab7571b80e7661ea673434eaf4cf1f1fd2d
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/966926
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Diffstat (limited to 'include/usbc_ppc.h')
| -rw-r--r-- | include/usbc_ppc.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/include/usbc_ppc.h b/include/usbc_ppc.h index 54142b2921..1995654536 100644 --- a/include/usbc_ppc.h +++ b/include/usbc_ppc.h @@ -48,6 +48,7 @@ struct ppc_drv { */ int (*vbus_source_enable)(int port, int enable); +#ifdef CONFIG_USBC_PPC_POLARITY /** * Inform the PPC of the polarity of the CC pins. * @@ -56,6 +57,7 @@ struct ppc_drv { * @return EC_SUCCESS on success, error otherwise. */ int (*set_polarity)(int port, int polarity); +#endif /** * Set the Vbus source path current limit @@ -75,6 +77,7 @@ struct ppc_drv { */ int (*discharge_vbus)(int port, int enable); +#ifdef CONFIG_USBC_PPC_VCONN /** * Turn on/off the VCONN FET. * @@ -82,6 +85,7 @@ struct ppc_drv { * @param enable: 1: enable VCONN FET 0: disable VCONN FET. */ int (*set_vconn)(int port, int enable); +#endif #ifdef CONFIG_CMD_PPC_DUMP /** @@ -104,9 +108,18 @@ struct ppc_drv { #endif /* defined(CONFIG_USB_PD_VBUS_DETECT_PPC) */ }; + +/* PPC SNK/SRC switch control driven by EC GPIO */ +#define PPC_CFG_FLAGS_GPIO_CONTROL (1 << 0) + struct ppc_config_t { + /* Used for PPC_CFG_FLAGS_* defined above */ + uint32_t flags; int i2c_port; int i2c_addr; + /* snk|src_gpio only required if PPC_CFG_FLAGS_GPIO_CONTROL is set */ + enum gpio_signal snk_gpio; + enum gpio_signal src_gpio; const struct ppc_drv *drv; }; |