diff options
| author | Andrew McRae <amcrae@google.com> | 2020-06-20 11:48:59 +1000 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-06-23 03:17:54 +0000 |
| commit | 131f7dc96e1c794befabdd8b182c7d5a190b58cc (patch) | |
| tree | cdab2380508491fe000509b8544f3b41677d87af /include | |
| parent | baceadc0e81945b1ca0e58ae09d3d4724a991d40 (diff) | |
| download | chrome-ec-131f7dc96e1c794befabdd8b182c7d5a190b58cc.tar.gz | |
npcx: Add a new flag to check for initial power-on
The CR50 will reset the EC on some platforms after power-on.
Add a reset flag to detect this and treat the second
restart as a power-on restart rather than reset.
Subsume the CONFIG_GPIO_INIT_POWER_ON_DELAY_MS config
to make it clear what the behaviour will be.
BUG=b:151329011
TEST=Confirm on dalboz, puff & variants that second reset is
treated correctly.
BRANCH=none
Change-Id: Ib66de920403f08099b87d1eff797270606b44f8f
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2255830
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
Tested-by: Andrew McRae <amcrae@chromium.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/config.h | 25 | ||||
| -rw-r--r-- | include/ec_commands.h | 1 | ||||
| -rw-r--r-- | include/reset_flag_desc.inc | 1 |
3 files changed, 14 insertions, 13 deletions
diff --git a/include/config.h b/include/config.h index 0edf5697c2..70d9179789 100644 --- a/include/config.h +++ b/include/config.h @@ -681,6 +681,18 @@ */ #undef CONFIG_BOARD_FORCE_RESET_PIN +/* + * For some boards on power-on, the EC is reset by the H1 after power-on, + * so the EC sees 2 resets. This config enables the EC to save a flag + * on the first power-up restart, and then wait for the second reset before + * any other setup is done (such as GPIOs, timers, UART etc.) + * On the second reset, the saved flag is used to detect the previous + * power-on, and treat the second reset as a power-on instead of a reset. + * + * NOTE: Implemented only for npcx + */ +#undef CONFIG_BOARD_RESET_AFTER_POWER_ON + /* Permanent LM4 boot configuration */ #undef CONFIG_BOOTCFG_VALUE @@ -1908,19 +1920,6 @@ #undef CONFIG_GESTURE_SIGMO_SKIP_MS #undef CONFIG_GESTURE_SIGMO_THRES_MG -/* - * Delay between power on and configuring GPIOs. - * On power-on of some boards, H1 releases the EC from reset but then - * quickly asserts and releases the reset a second time. This means the - * EC sees 2 resets: (1) power-on reset, (2) reset-pin reset. If we add - * a delay between reset (1) and configuring GPIO output levels, then - * reset (2) will happen before the end of the delay so we avoid extra - * output toggles. - * - * NOTE: Implemented only for npcx - */ -#undef CONFIG_GPIO_INIT_POWER_ON_DELAY_MS - /* Support getting gpio flags. */ #undef CONFIG_GPIO_GET_EXTENDED diff --git a/include/ec_commands.h b/include/ec_commands.h index c239de8b66..877ce10018 100644 --- a/include/ec_commands.h +++ b/include/ec_commands.h @@ -5799,6 +5799,7 @@ struct ec_params_set_cbi { */ #define EC_RESET_FLAG_EFS BIT(20) /* Jumped to this image by EFS */ #define EC_RESET_FLAG_AP_IDLE BIT(21) /* Leave alone AP */ +#define EC_RESET_FLAG_INITIAL_PWR BIT(22) /* EC had power, then was reset */ struct ec_response_uptime_info { /* diff --git a/include/reset_flag_desc.inc b/include/reset_flag_desc.inc index ea7f8b567e..ed3ce69a0d 100644 --- a/include/reset_flag_desc.inc +++ b/include/reset_flag_desc.inc @@ -29,3 +29,4 @@ "stay-in-ro", "efs", "ap-idle", +"initial-pwr", |