diff options
| author | Jack Rosenthal <jrosenth@chromium.org> | 2022-06-27 15:15:03 -0600 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-06-29 13:04:33 +0000 |
| commit | 0f5684c5f7ccce127263cb54b9ea7c4711e8ba22 (patch) | |
| tree | ee6c26d2acc5b506315d06416d0c1e70054a98a4 /include | |
| parent | bfe144c2623152fe596aa2b85f1b21e14141f3f3 (diff) | |
| download | chrome-ec-0f5684c5f7ccce127263cb54b9ea7c4711e8ba22.tar.gz | |
include/power/skylake.h: Format with clang-format
BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I7474590e12b94190eb0c47123efd697f94ac454e
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730389
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/power/skylake.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/include/power/skylake.h b/include/power/skylake.h index c8a656c6c5..9d9186afd4 100644 --- a/include/power/skylake.h +++ b/include/power/skylake.h @@ -12,13 +12,13 @@ * Input state flags. * TODO: Normalize the power signal masks from board defines to SoC headers. */ -#define IN_PCH_SLP_S3_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S3_DEASSERTED) -#define IN_PCH_SLP_S4_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S4_DEASSERTED) +#define IN_PCH_SLP_S3_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S3_DEASSERTED) +#define IN_PCH_SLP_S4_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S4_DEASSERTED) #define IN_PCH_SLP_SUS_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_SUS_DEASSERTED) -#define IN_ALL_PM_SLP_DEASSERTED (IN_PCH_SLP_S3_DEASSERTED | \ - IN_PCH_SLP_S4_DEASSERTED | \ - IN_PCH_SLP_SUS_DEASSERTED) +#define IN_ALL_PM_SLP_DEASSERTED \ + (IN_PCH_SLP_S3_DEASSERTED | IN_PCH_SLP_S4_DEASSERTED | \ + IN_PCH_SLP_SUS_DEASSERTED) /* * DPWROK is NC / stuffing option on initial boards. |