Cr50: Enable TPM-protocol data over the SPI bus

This patch adds a module which runs on top of the SPS driver and
implements the TCG SPI TPM protocol.

Basic register read and write functions are implemented as well as
rudimentary TPM state machine (claiming/releasing locality).

An enhancement is made to the SPS driver to ensure that when the CS is
deasserted the transmit FIFO is reset too, on the off chance of the CS
going away mid transaction for whatever reason.

In this implementation the slave is guaranteed to stall the master for
a few bytes in both receive and transmit transactions, which is
further aggravated by the fact that RX FIFO threshold is set to 8
(this is the minimum number of bytes the master has to send to wake up
the slave). This could be fine tuned later, for instance made a
parameter of the receive callback registration function.

BRANCH=none
BUG=chrome-os-partner:43025
TEST=trunksd initialization (with minor changes to accommodate new
     VID/DID and some status bits, to be published) succeeds with the
     cr50 connected to the USB/SPI cable.

Change-Id: I28d37c3b57dde9adf59e81426efe4f58880cf0b0
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/285252

2 files changed, 30 insertions, 0 deletions

diff --git a/include/config.h b/include/config.h
index 17d0712b79..ad28fc8e71 100644
--- a/include/config.h
+++ b/include/config.h
@@ -1457,6 +1457,12 @@
 #undef CONFIG_TEMP_SENSOR_POWER_GPIO
 
 /*****************************************************************************/
+/* TPM-like configuration */
+
+/* Speak the TPM SPI Hardware Protocol on the SPI slave interface */
+#undef CONFIG_TPM_SPS
+
+/*****************************************************************************/
 /* USART stream config */
 #undef CONFIG_STREAM_USART
 
diff --git a/include/tpm_registers.h b/include/tpm_registers.h
new file mode 100644
index 0000000000..cdf8410a51
--- /dev/null
+++ b/include/tpm_registers.h
@@ -0,0 +1,24 @@
+/* Copyright 2015 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/*
+ * This defines the interface functions for TPM SPI Hardware Protocol. The SPI
+ * master reads or writes between 1 and 64 bytes to a register designated by a
+ * 24-bit address. There is no provision for error reporting at this level.
+ */
+
+#ifndef __CROS_EC_TPM_REGISTERS_H
+#define __CROS_EC_TPM_REGISTERS_H
+
+#include <stdint.h>
+
+/* The SPI master is writing data into a TPM register. */
+void tpm_register_put(uint32_t regaddr,
+		      const uint8_t *data, uint32_t data_size);
+
+/* The SPI master is reading data from a TPM register. */
+void tpm_register_get(uint32_t regaddr, uint8_t *dest, uint32_t data_size);
+
+#endif	/* __CROS_EC_TPM_REGISTERS_H */