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authorDino Li <dino.li@ite.com.tw>2016-01-25 15:01:18 +0800
committerchrome-bot <chrome-bot@chromium.org>2016-01-26 23:59:47 -0800
commit72ad2608470a58ad2f82c076229feddfcbc2a6a2 (patch)
tree52fcbe32d8d8fec4423620818a3b05be4a780756 /include
parent74e81bf9daba09b989a4e9e3153e7db5e6c4e730 (diff)
downloadchrome-ec-72ad2608470a58ad2f82c076229feddfcbc2a6a2.tar.gz
chip: it83xx: update ec2i module
1. The previous EC2I module does not meet section '7.17.5 EC2I Programming Guide'. We need to correct it to prevent conflict with H2RAM (LPC I/O cycles 800h ~ 9ffh) which cause LPC keeps long wait states. NOTE: If EC is using EC2I internal bus to access PNPCFG registers while host accessing EC ram through H2RAM interface at the same time, the symptom will appear. 2. Remove 'CONFIG_IT83XX_PNPCFG_HOST_ACCESS'. We don't allow the host access PNPCFG registers. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. To use console command 'rwreg' to r/w PNPCFG registers and there is no error code return. 2. To create a stress test for this change. - EC use 'ec2i_read()' and 'ec2i_write()' to access PNPCFG registers per-10ms. - run ectool 'version' command per-100ms. Before the change was made, LPC will keep in long wait states immediately. After the change, we run the test of ectool 'version' command over 20000 times. Change-Id: I84e86fc17ef624d4a60a1a051bc301ebdf56a3da Reviewed-on: https://chromium-review.googlesource.com/323563 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'include')
-rw-r--r--include/config.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/include/config.h b/include/config.h
index b98f940f61..d307b75ad2 100644
--- a/include/config.h
+++ b/include/config.h
@@ -1178,9 +1178,6 @@
/* Interrupt for PECI module. (IT839X series and IT838X DX only) */
#undef CONFIG_IT83XX_PECI_WITH_INTERRUPT
-/* Allow the host access to the PNPCFG registers */
-#undef CONFIG_IT83XX_PNPCFG_HOST_ACCESS
-
/* To define it, if I2C channel C and PECI used at the same time. */
#undef CONFIG_IT83XX_SMCLK2_ON_GPC7