diff options
| author | Vincent Palatin <vpalatin@chromium.org> | 2018-03-02 11:17:11 +0100 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2018-03-07 22:26:11 +0000 |
| commit | c39ecbc5f3fdc2106789885f58c26f982051a851 (patch) | |
| tree | 3fc605851bb6049e59fe44676c62c26db6e4a8fd /include | |
| parent | fa66e09ccff0fc6903ea82b6c0adc4b2271aaabd (diff) | |
| download | chrome-ec-c39ecbc5f3fdc2106789885f58c26f982051a851.tar.gz | |
core: add chip-specific memory regions definition mechanism
When a chip has special/non-contiguous SRAM physical memory region,
rather than extending the generic linker file ad nauseam, define a
mechanism to declare a chip specific list of those regions.
To do so, a chip must declare the CONFIG_CHIP_MEMORY_REGIONS
configuration and have a memory_regions.inc with the list of regions.
The special-purpose preprocessed chip/<chip_name>/memory_regions.inc
file has one region declaration per line using the following macro:
REGION(name, attributes, start_address, size)
Each region will get a proper MEMORY entry and a section in the linker
file.
the __SECTION(region_name) helper is provided as a convenience to
declare variable in a specific region.
Note: those 'special' regions are NOT cleared at startup contrary to
.bss.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:67081508
TEST=on ZerbleBarn, along with the following CLs, run the firmware with
large arrays in special AHB memory regions.
Reviewed-on: https://chromium-review.googlesource.com/946368
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
(cherry picked from commit b42dd73603844c03b44d88a4513df330ee168496)
Change-Id: I3f156ef6e5feb4a6a0b2ae2468bae8a20483f17c
Reviewed-on: https://chromium-review.googlesource.com/953785
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/config.h | 10 | ||||
| -rw-r--r-- | include/link_defs.h | 7 |
2 files changed, 17 insertions, 0 deletions
diff --git a/include/config.h b/include/config.h index 902c4c11e2..a6cf65efa1 100644 --- a/include/config.h +++ b/include/config.h @@ -676,6 +676,16 @@ /*****************************************************************************/ /* + * The chip needs to define special SRAM memory regions as linker sections. + * Those regions are defined in the special-purpose preprocessed file in + * chip/<chip_name>/memory_regions.inc using the following macro: + * REGION(name, attributes, start_address, size) + * + * Note: these 'special' regions are NOT cleared at startup contrary to .bss. + */ +#undef CONFIG_CHIP_MEMORY_REGIONS + +/* * Chip needs to do pre-init very early in main(), and provides chip_pre_init() * to do so. */ diff --git a/include/link_defs.h b/include/link_defs.h index c12a350924..f27651691c 100644 --- a/include/link_defs.h +++ b/include/link_defs.h @@ -104,4 +104,11 @@ extern const void *__ro_end; extern const void *__data_start; extern const void *__data_end; +/* Helper for special chip-specific memory sections */ +#ifdef CONFIG_CHIP_MEMORY_REGIONS +#define __SECTION(name) __attribute__((section("." STRINGIFY(name) ".50_auto"))) +#else +#define __SECTION(name) +#endif /* CONFIG_MEMORY_REGIONS */ + #endif /* __CROS_EC_LINK_DEFS_H */ |