diff options
author | Diana Z <dzigterman@chromium.org> | 2018-11-08 11:02:22 -0700 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2018-11-13 16:26:21 -0800 |
commit | b072948de622962e77c03f0a1853432dc6633626 (patch) | |
tree | 604374f7e8e6ed3f1aeca32377488ddec5271f13 /include | |
parent | 40b8b2bc6ffb9103c60f8fe89c9c3eebf899a0e8 (diff) | |
download | chrome-ec-b072948de622962e77c03f0a1853432dc6633626.tar.gz |
SN5S330: treat interrupts as level-sensitive
The SN5S330 PPC will pull its /INT pin low until all interrupts are
cleared. Since the interrupt pin is treated as edge-sensitive, its
handler needs to provide level-checking before exiting. Otherwise, if
not all interrupts are cleared before the handler exits, the EC won't
see another edge to call the handler again.
Boards which share the PPC interrupt pin with other sources may choose
to implement their own callback, if they are able to determine which
chip was the source of the interrupt.
BUG=b:118846062
BRANCH=None
TEST=performed several power swaps and unplugs on a pair of Careenas,
verifying that in instances where the handler had to loop around we
correctly cleared the interrupts and the "ectool usbpdpower" output was
normal
Change-Id: Iccbe40976a746d109d67b9a91f8fbd81898f9b3f
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1327123
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/config.h | 3 | ||||
-rw-r--r-- | include/usbc_ppc.h | 8 |
2 files changed, 11 insertions, 0 deletions
diff --git a/include/config.h b/include/config.h index 5e9533e492..6f283416e4 100644 --- a/include/config.h +++ b/include/config.h @@ -3338,6 +3338,9 @@ /* PPC is capable of providing VCONN */ #undef CONFIG_USBC_PPC_VCONN +/* PPC has level interrupts and has a dedicated interrupt pin to check */ +#undef CONFIG_USBC_PPC_DEDICATED_INT + /* Support for USB type-c superspeed mux */ #undef CONFIG_USBC_SS_MUX diff --git a/include/usbc_ppc.h b/include/usbc_ppc.h index a93f7e7109..06c2ff3f2f 100644 --- a/include/usbc_ppc.h +++ b/include/usbc_ppc.h @@ -222,4 +222,12 @@ void board_overcurrent_event(int port); */ int ppc_enter_low_power_mode(int port); +/** + * Board specific callback to check if the PPC interrupt is still asserted + * + * @param port: The Type-C port number to check + * @return 0 if interrupt is cleared, 1 if it is still on + */ +int ppc_get_alert_status(int port); + #endif /* !defined(__CROS_EC_USBC_PPC_H) */ |