common: provide config option for 64-bit hwtimer

This adds a config option, CONFIG_HWTIMER_64BIT, which when enabled
expects the chip implementation to define __hw_clock_source_read64 and
__hw_clock_source_set64. This allows for support of native 64-bit
hardware clock when available on hardware instead of a rollover
interrupt style.

BUG=chromium:976804
BRANCH=none
TEST=made implementation of 64-bit hardware timer for ISH (child CL),
and working great

Change-Id: Idb2c3bb8f804e6c83a33901c953ddd5f1ae89784
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1668055
Reviewed-by: Yuval Peress <peress@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>

2 files changed, 44 insertions, 3 deletions

diff --git a/include/config.h b/include/config.h
index c71d79461e..ed7acaa0ad 100644
--- a/include/config.h
+++ b/include/config.h
@@ -2111,6 +2111,16 @@
  */
 #undef CONFIG_HIBERNATE_PSL
 
+/*
+ * Chip supports a 64-bit hardware timer and implements
+ * __hw_clock_source_read64 and __hw_clock_source_set64.
+ *
+ * Chips with this config enabled may optionally define
+ * __hw_clock_source_read as a 32-bit set function for
+ * latency-sensitive situations.
+ */
+#undef CONFIG_HWTIMER_64BIT
+
 /* Use a hardware specific udelay(). */
 #undef CONFIG_HW_SPECIFIC_UDELAY
 
diff --git a/include/hwtimer.h b/include/hwtimer.h
index b83fcc8e76..3c0e9aaf8a 100644
--- a/include/hwtimer.h
+++ b/include/hwtimer.h
@@ -25,16 +25,19 @@ uint32_t __hw_clock_event_get(void);
 void __hw_clock_event_clear(void);
 
 /**
- * Get the value of the free-running counter used as clock
+ * Get the lower 32-bits of the free-running counter used as clock
  *
  * The counter resolution must be 1us, since udelay() relies on this.
  *
  * @return current counter value
  */
+#ifdef CONFIG_HWTIMER_64BIT
+__override_proto
+#endif
 uint32_t __hw_clock_source_read(void);
 
 /**
- * Override the current value of the hardware counter
+ * Override the lower 32-bits of the hardware counter
  *
  * The new value takes effect immediately and the counter continues counting
  * from there, assuming it is enabled
@@ -44,6 +47,25 @@ uint32_t __hw_clock_source_read(void);
 void __hw_clock_source_set(uint32_t ts);
 
 /**
+ * Get the 64-bit value of the free-running counter used as clock,
+ * only available when CONFIG_HWTIMER_64BIT is enabled.
+ *
+ * This function should only be used by common/timer.c or
+ * chip-specific code, as get_time() abstracts the config option away.
+ */
+uint64_t __hw_clock_source_read64(void);
+
+/**
+ * Override the 64-bit value of the free-running counter used as
+ * clock, only available when CONFIG_HWTIMER_64BIT is enabled.
+ *
+ * This function should only be used by common/timer.c or
+ * chip-specific code, as force_time() abstracts the config option
+ * away.
+ */
+void __hw_clock_source_set64(uint64_t timestamp);
+
+/**
  * Enable clock to a timer.
  *
  * @param n		Timer number to enable/disable
@@ -60,9 +82,18 @@ void __hw_timer_enable_clock(int n, int enable);
 int __hw_clock_source_init(uint32_t start_t);
 
 /**
+ * Initializes the hardware timer used to provide clock services, using the
+ * specified start timer value (CONFIG_HWTIMER_64BIT enabled).
+ *
+ * It returns the IRQ number of the timer routine.
+ */
+int __hw_clock_source_init64(uint64_t start_t);
+
+/**
  * Searches the next deadline and program it in the timer hardware.
  *
- * overflow: if true, the 32-bit counter as overflowed since the last call.
+ * overflow: if true, the 32-bit counter as overflowed since the last
+ * call. Goes unused if CONFIG_HWTIMER_64BIT is enabled.
  *
  * This function is exported from the common timers code as an helper for the
  * hardware timer interrupt routine.