diff options
| author | Caveh Jalali <caveh@google.com> | 2019-10-30 08:27:58 +0000 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2019-10-30 11:13:58 +0000 |
| commit | f686d6c5862b94a5c919a90946ed032e22b80388 (patch) | |
| tree | 5871df759d0321d7ba71c707c90acd84776cc2fc /include | |
| parent | 4548b81d8ec8d58339c7981c81f9edae5dd91c6f (diff) | |
| download | chrome-ec-f686d6c5862b94a5c919a90946ed032e22b80388.tar.gz | |
Revert "smart_battery: add smbus error checking support"
This reverts commit daccb3adea9394116d7ab2c807e4a360cb5a93a1.
Reason for revert: <INSERT REASONING HERE>
broke USB-C charging. all we get now is:
2019-10-30 01:26:15 New chg p0[49.441303 CL: p0 s2 i500 v5000]
2019-10-30 01:26:16 C0 st5
2019-10-30 01:26:16 C0 Req [1] 5000mV 3000mA
2019-10-30 01:26:16 New chg p0[50.305144 CL: p0 s0 i500 v5000]
2019-10-30 01:26:16 C0 HARD RST RX
2019-10-30 01:26:16 C0 st4
2019-10-30 01:26:16 New chg p0[50.354280 CL: p0 s2 i500 v5000]
2019-10-30 01:26:17 C0 st5
2019-10-30 01:26:17 C0 Req [1] 5000mV 3000mA
...
Original change's description:
> smart_battery: add smbus error checking support
>
> Jacuzzi/Kodama has a unstable software controlled i2c bus, its data
> transmission may be interrupted by other higher priority tasks and
> causes device timeout.
>
> If timeout happens when ec is reading data, it has no knowledge about
> what's happening on slave, and keep receiving bad data (0xFF's) until
> end. The standard i2c/smbus error handling mechanism can not handle this
> case, so we need the error checking feature from smbus 1.1 to ensure our
> received data is correct.
>
> This CL adds the error checking (PEC) functions to i2c and smart battery
> module.
>
> BUG=b:138415463
> TEST=On kodama, enable CONFIG_CMD_I2C_STRESS_TEST,
> no failure after 100k read/writes.
> test code at CL:1865054
> BRANCH=master
>
> Change-Id: Ibb9ad3aa03d7690a08f59c617c2cd9c1b9cb0ff3
> Signed-off-by: Ting Shen <phoenixshen@google.com>
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1827138
> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
> Tested-by: Ting Shen <phoenixshen@chromium.org>
> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Bug: b:138415463
Change-Id: Ibd8a512dd6d43cca95628f698e7a66a695b7fc59
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1889435
Reviewed-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Caveh Jalali <caveh@google.com>
Tested-by: Caveh Jalali <caveh@google.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/battery_smart.h | 7 | ||||
| -rw-r--r-- | include/config.h | 18 | ||||
| -rw-r--r-- | include/i2c.h | 2 |
3 files changed, 0 insertions, 27 deletions
diff --git a/include/battery_smart.h b/include/battery_smart.h index 9295cb884a..1c088a5e27 100644 --- a/include/battery_smart.h +++ b/include/battery_smart.h @@ -91,13 +91,6 @@ #define STATUS_TERMINATE_CHARGE_ALARM BIT(14) #define STATUS_OVERCHARGED_ALARM BIT(15) -/* Battery Spec Info */ -#define BATTERY_SPEC_VERSION(INFO) ((INFO >> 4) & 0xF) -/* Smart battery version info */ -#define BATTERY_SPEC_VER_1_0 1 -#define BATTERY_SPEC_VER_1_1 2 -#define BATTERY_SPEC_VER_1_1_WITH_PEC 3 - /* Charger alarm warning */ #define ALARM_OVER_CHARGED 0x8000 #define ALARM_TERMINATE_CHARGE 0x4000 diff --git a/include/config.h b/include/config.h index a4d3545422..52d7bb44fa 100644 --- a/include/config.h +++ b/include/config.h @@ -2284,20 +2284,6 @@ */ #undef CONFIG_I2C_MULTI_PORT_CONTROLLER -/* - * Packet error checking support for SMBus. - * - * If defined, adds error checking support for i2c_readN, i2c_writeN, - * i2c_read_string and i2c_write_block. Where - * - write operation appends an error checking byte at end of transfer, and - * - read operatoin verifies the correctness of error checking byte from the - * slave. - * Set I2C_FLAG on addr_flags parameter to use this feature. - * - * This option also enables error checking function on smart batteries. - */ -#undef CONFIG_SMBUS_PEC - /*****************************************************************************/ /* IPI configuration. Support mt_scp only for now. */ @@ -4997,8 +4983,4 @@ #define CONFIG_SHA256 #endif -#ifdef CONFIG_SMBUS_PEC -#define CONFIG_CRC8 -#endif - #endif /* __CROS_EC_CONFIG_H */ diff --git a/include/i2c.h b/include/i2c.h index 4be5472a11..0d68b5bc90 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -35,13 +35,11 @@ * address that is pertinent to its use. */ #define I2C_ADDR_MASK 0x03FF -#define I2C_FLAG_PEC BIT(13) #define I2C_FLAG_BIG_ENDIAN BIT(14) /* BIT(15) SPI_FLAG - used in motion_sense to overload address */ #define I2C_FLAG_ADDR_IS_SPI BIT(15) #define I2C_GET_ADDR(addr_flags) ((addr_flags) & I2C_ADDR_MASK) -#define I2C_USE_PEC(addr_flags) ((addr_flags) & I2C_FLAG_PEC) #define I2C_IS_BIG_ENDIAN(addr_flags) ((addr_flags) & I2C_FLAG_BIG_ENDIAN) /* |