diff options
| author | Ting Shen <phoenixshen@google.com> | 2019-10-03 15:12:53 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2019-11-25 13:21:16 +0000 |
| commit | cb76d8db34853b402e295cd4f82953c37e51752e (patch) | |
| tree | eaeffbf0826970c7cc5059f4ff30f5a160616618 /include | |
| parent | aab3448bb85abab2e56ddef510d976c5ed549c4c (diff) | |
| download | chrome-ec-cb76d8db34853b402e295cd4f82953c37e51752e.tar.gz | |
Reland "smart_battery: add smbus error checking support"
This is a reland of daccb3adea9394116d7ab2c807e4a360cb5a93a1
Original change's description:
> smart_battery: add smbus error checking support
>
> Jacuzzi/Kodama has a unstable software controlled i2c bus, its data
> transmission may be interrupted by other higher priority tasks and
> causes device timeout.
>
> If timeout happens when ec is reading data, it has no knowledge about
> what's happening on slave, and keep receiving bad data (0xFF's) until
> end. The standard i2c/smbus error handling mechanism can not handle this
> case, so we need the error checking feature from smbus 1.1 to ensure our
> received data is correct.
>
> This CL adds the error checking (PEC) functions to i2c and smart battery
> module.
>
> BUG=b:138415463
> TEST=On kodama, enable CONFIG_CMD_I2C_STRESS_TEST,
> no failure after 100k read/writes.
> test code at CL:1865054
> BRANCH=master
>
> Change-Id: Ibb9ad3aa03d7690a08f59c617c2cd9c1b9cb0ff3
> Signed-off-by: Ting Shen <phoenixshen@google.com>
> Reviewed-on: http://crrev.com/c/1827138
> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
> Tested-by: Ting Shen <phoenixshen@chromium.org>
> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
BUG=b:138415463
TEST=in addition to the TESTs above, verified this CL boots on
hatch(npcx chips), and reef_it8320(it83xx chips).
BRANCH=master
Change-Id: I67975eee677cfd6e383742d48103662372cac061
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1913940
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/battery_smart.h | 7 | ||||
| -rw-r--r-- | include/config.h | 18 | ||||
| -rw-r--r-- | include/i2c.h | 2 |
3 files changed, 27 insertions, 0 deletions
diff --git a/include/battery_smart.h b/include/battery_smart.h index 1c088a5e27..9295cb884a 100644 --- a/include/battery_smart.h +++ b/include/battery_smart.h @@ -91,6 +91,13 @@ #define STATUS_TERMINATE_CHARGE_ALARM BIT(14) #define STATUS_OVERCHARGED_ALARM BIT(15) +/* Battery Spec Info */ +#define BATTERY_SPEC_VERSION(INFO) ((INFO >> 4) & 0xF) +/* Smart battery version info */ +#define BATTERY_SPEC_VER_1_0 1 +#define BATTERY_SPEC_VER_1_1 2 +#define BATTERY_SPEC_VER_1_1_WITH_PEC 3 + /* Charger alarm warning */ #define ALARM_OVER_CHARGED 0x8000 #define ALARM_TERMINATE_CHARGE 0x4000 diff --git a/include/config.h b/include/config.h index d95d938ce4..d9b8afcd8b 100644 --- a/include/config.h +++ b/include/config.h @@ -2310,6 +2310,20 @@ */ #undef CONFIG_I2C_MULTI_PORT_CONTROLLER +/* + * Packet error checking support for SMBus. + * + * If defined, adds error checking support for i2c_readN, i2c_writeN, + * i2c_read_string and i2c_write_block. Where + * - write operation appends an error checking byte at end of transfer, and + * - read operatoin verifies the correctness of error checking byte from the + * slave. + * Set I2C_FLAG on addr_flags parameter to use this feature. + * + * This option also enables error checking function on smart batteries. + */ +#undef CONFIG_SMBUS_PEC + /*****************************************************************************/ /* IPI configuration. Support mt_scp only for now. */ @@ -5077,4 +5091,8 @@ #define CONFIG_SHA256 #endif +#ifdef CONFIG_SMBUS_PEC +#define CONFIG_CRC8 +#endif + #endif /* __CROS_EC_CONFIG_H */ diff --git a/include/i2c.h b/include/i2c.h index 0d68b5bc90..4be5472a11 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -35,11 +35,13 @@ * address that is pertinent to its use. */ #define I2C_ADDR_MASK 0x03FF +#define I2C_FLAG_PEC BIT(13) #define I2C_FLAG_BIG_ENDIAN BIT(14) /* BIT(15) SPI_FLAG - used in motion_sense to overload address */ #define I2C_FLAG_ADDR_IS_SPI BIT(15) #define I2C_GET_ADDR(addr_flags) ((addr_flags) & I2C_ADDR_MASK) +#define I2C_USE_PEC(addr_flags) ((addr_flags) & I2C_FLAG_PEC) #define I2C_IS_BIG_ENDIAN(addr_flags) ((addr_flags) & I2C_FLAG_BIG_ENDIAN) /* |