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| author | Ruibin Chang <ruibin.chang@ite.com.tw> | 2020-07-07 15:20:51 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-07-14 06:46:03 +0000 |
| commit | ba4b10a78f8da08a56651eebf6941571a0d1d751 (patch) | |
| tree | 1f4bf1b10754579fcac40349dad055e1d1c7a455 /include | |
| parent | 3c07efdf6d9242c345148c601a6ade576aa24247 (diff) | |
| download | chrome-ec-ba4b10a78f8da08a56651eebf6941571a0d1d751.tar.gz | |
TCPMv1, TCPMv2: add pd event for receiving hard reset
When we receive hard reset message, we call pd_execute_hard_reset()
and set task to hard reset state, but the waked up pd_task() may have
chance setting to other state. So I add a pd event for receiving hard
reset, then waked up pd_task() set the state to hard reset.
TCPMv1: When we are in SNK_HRAD_RESET_RECOVER state, we enable rx.
At this time If port partner sends source capability, HW auto responds
GoodCRC, but in SNK_HRAD_RESET_RECOVER state the handle_data_request()
can't process source capability then break the case. So partner sender
response timeout and tx hard reset. So I move the enable_rx() to
SNK_DISCOVERY state that we are able to handle source capability.
BRANCH=None
BUG=b:159394180
TEST=On board reef_it8320, and it81202_pdevb:
1.TCPMv1: Rx Hard reset -> done Vbus cycle, and keep cc connection,
When we're SRC and SNK.
2.TCPMv2: Rx Hard reset -> done Vbus cycle, and keep cc connection,
When we're SRC and SNK.
Change-Id: Ia4944883f4ee0420183cb4d1ec62743c49386ea3
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1389992
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/usb_pd.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/include/usb_pd.h b/include/usb_pd.h index 547ccec54a..897517d57c 100644 --- a/include/usb_pd.h +++ b/include/usb_pd.h @@ -66,8 +66,10 @@ enum pd_rx_errors { #define PD_EVENT_SM TASK_EVENT_CUSTOM_BIT(10) /* Prepare for sysjump */ #define PD_EVENT_SYSJUMP TASK_EVENT_CUSTOM_BIT(11) +/* Receive a Hard Reset. */ +#define PD_EVENT_RX_HARD_RESET TASK_EVENT_CUSTOM_BIT(12) /* First free event on PD task */ -#define PD_EVENT_FIRST_FREE_BIT 12 +#define PD_EVENT_FIRST_FREE_BIT 13 /* Ensure TCPC is out of low power mode before handling these events. */ #define PD_EXIT_LOW_POWER_EVENT_MASK \ |