tcpmv2: cache analog and collision Rp in CL

Adding update_cc mechanism to keep correct Rp set

BUG=b:158291622
BRANCH=none
TEST=check Rp value over attach, hard reset and pr-swap

Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: I369c71e637cbb6a8fc37b434194ce39cc9bf5417
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2232830
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>

1 files changed, 33 insertions, 0 deletions

diff --git a/include/usb_pd.h b/include/usb_pd.h
index 61d87d4843..4b63eed869 100644
--- a/include/usb_pd.h
+++ b/include/usb_pd.h
@@ -2988,4 +2988,37 @@ __override_proto enum ec_pd_port_location board_get_pd_port_location(int port);
  * does nothing, but a board may override it.
  */
 __override_proto void board_vbus_present_change(void);
+
+/****************************************************************************
+ * TCPC CC/Rp Management
+ */
+/**
+ * Called to cache Source Current Limit
+ * A call to typec_update_cc will actually update the hardware to reflect the
+ * cache.
+ *
+ * @param port The PD port number
+ * @param rp   Rp is the Current Limit to advertise
+ */
+void typec_select_src_current_limit_rp(int port, enum tcpc_rp_value rp);
+
+/**
+ * Called to cache Source Collision Rp
+ * A call to typec_update_cc will actually update the hardware to reflect the
+ * cache.
+ *
+ * @param port The PD port number
+ * @param rp   Rp is the Collision Avoidance Rp value
+ */
+void typec_select_src_collision_rp(int port, enum tcpc_rp_value rp);
+
+/**
+ * Called to update cached CC/Rp values to hardware
+ *
+ * @param port The PD port number
+ * @return 0 on success else failure
+ */
+int typec_update_cc(int port);
+/****************************************************************************/
+
 #endif  /* __CROS_EC_USB_PD_H */