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author | Daisuke Nojiri <dnojiri@chromium.org> | 2019-03-06 02:44:17 +0000 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2019-03-06 06:51:28 -0800 |
commit | f2ea9714253427c81f9d154d0502d0d10124a8d2 (patch) | |
tree | 5afbabf9999f27314108b9843e31e9637cd0aa53 /include | |
parent | 19450284dfb48c3c0677dfc4215f3206195455c8 (diff) | |
download | chrome-ec-f2ea9714253427c81f9d154d0502d0d10124a8d2.tar.gz |
Revert "npcx: pwm: Use DCRn greater than CTRn to present its duty cycle is zero."
This reverts commit 93d7bcea8121869520b0d02bf94f95eb261bee05.
Reason for revert: fan_is_stalled is broken
Original change's description:
> npcx: pwm: Use DCRn greater than CTRn to present its duty cycle is zero.
>
> In npcx pwm driver, it turns off pwm module directly when its duty cycle
> is set to zero. But we saw pwm signal isn't turned off by the following
> sequence:
> 1. pwm_set_raw_duty(ch, 0);
> 2. pwm_enable(ch, 1);
>
> Please notice setting zero in DCRn doesn't mean duty cycle is zero.
> (NPCX duty cycle: ( (DCRn+1) / (CTRn+1) ) x 100). Hence in step 2, we
> can observe a very low duty cycle once the driver enables pwm module.
>
> According to figure. 24 in npcx5's datasheet, setting DCRn greater than
> CTRn means that the result of 16-bits comparator is always false. It
> equals the duty cycle is zero. This CL adopts this method to present it
> and removes the dependency between pwm_enable()/ pwm_get_enabled() and
> pwm_set_raw_duty()/pwm_get_duty().
>
> In order to make sure DCRn can be greater than CTRn, we also defined
> the PWN maximum duty cycle is (0xFFFF -1) since both DCR and CTR are
> 16-bits registers.
>
> BRANCH=none
> BUG=b:123552920
> TEST=No build errors for npcx5/7 series.
>
> Test pwm console command on npcx5/7 evbs by the following sequence.
> 1. pwm_set_raw_duty(ch, 0);
> 2. pwm_enable(ch, 1);
> And no symptoms are observed. PWM_CONFIG_ACTIVE_LOW flag is tested also
> and no symptom occurred.
>
> Test fan control by faninfo & fanset console commands. Connect Sunon
> 4-pins PWM fan and evb by following steps:
> 1. Connect PWM0 to PWM pin of fan.
> 2. Connect TA1_TACH1 and 3.3 PU on Tacho pin of fan.
> 3. Connect 5V and GND pins of fan to power supply.
> No symptoms are observed.
>
> Change-Id: I92517ff0bf3e027ae191be00112cd71ec4b55a2b
> Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
> Reviewed-on: https://chromium-review.googlesource.com/1475096
> Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Bug: b:123552920
Change-Id: Iece29c665d3a7518159514291f3c17a7b58c3284
Reviewed-on: https://chromium-review.googlesource.com/1505014
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/pwm.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/pwm.h b/include/pwm.h index 15413c537c..24b89332fc 100644 --- a/include/pwm.h +++ b/include/pwm.h @@ -20,6 +20,12 @@ void pwm_enable(enum pwm_channel ch, int enabled); int pwm_get_enabled(enum pwm_channel ch); /** + * Set PWM channel frequency (Hz). + * PWM will be disabled until the duty is set. + */ +void pwm_set_freq(enum pwm_channel ch, uint32_t freq); + +/** * Set PWM channel duty cycle (0-65535). */ void pwm_set_raw_duty(enum pwm_channel ch, uint16_t duty); |