diff options
author | Michał Barnaś <mb@semihalf.com> | 2021-11-17 17:49:27 +0100 |
---|---|---|
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-09-09 18:49:03 +0000 |
commit | 538a24ab36652a61795d108707b891c3ad4867cc (patch) | |
tree | 410a531ab6b0a77c818319025887e39aa9674fdf /include | |
parent | 3d2a1c9fb1ebb38a0e5ca291e237d569da3bb904 (diff) | |
download | chrome-ec-538a24ab36652a61795d108707b891c3ad4867cc.tar.gz |
config: rename HOSTCMD_ESPI_* to HOST_INTERFACE_ESPI_*
Rename ESPI additional configs to match the name of base config
that selects ESPI as HOST_INTERFACE.
BUG=b:195416058
BRANCH=main
TEST=zmake testall && make buildall
Change-Id: I137449a1a58b1ea0d9794ebc0900e1b68413819d
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3291744
Reviewed-by: Sam Hurst <shurst@google.com>
Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/config.h | 26 | ||||
-rw-r--r-- | include/power/intel_x86.h | 6 |
2 files changed, 16 insertions, 16 deletions
diff --git a/include/config.h b/include/config.h index 7530a9d853..a137e20389 100644 --- a/include/config.h +++ b/include/config.h @@ -3277,15 +3277,15 @@ * SLP signals (SLP_S3, SLP_S4, and SLP_S5) use virtual wires instead of * physical pins with eSPI interface. */ -#undef CONFIG_HOSTCMD_ESPI_VW_SLP_S3 -#undef CONFIG_HOSTCMD_ESPI_VW_SLP_S4 -#undef CONFIG_HOSTCMD_ESPI_VW_SLP_S5 +#undef CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S3 +#undef CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S4 +#undef CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S5 /* MCHP next two items are EC eSPI slave configuration */ /* Maximum clock frequence eSPI EC slave advertises * Values in MHz are 20, 25, 33, 50, and 66 */ -#undef CONFIG_HOSTCMD_ESPI_EC_MAX_FREQ +#undef CONFIG_HOST_INTERFACE_ESPI_EC_MAX_FREQ /* EC eSPI slave advertises IO lanes * 0 = Single @@ -3293,7 +3293,7 @@ * 2 = Single and Quad * 3 = Single, Dual, and Quad */ -#undef CONFIG_HOSTCMD_ESPI_EC_MODE +#undef CONFIG_HOST_INTERFACE_ESPI_EC_MODE /* Bit map of eSPI channels EC advertises * bit[0] = 1 Peripheral channel @@ -3301,7 +3301,7 @@ * bit[2] = 1 OOB channel * bit[3] = 1 Flash channel */ -#undef CONFIG_HOSTCMD_ESPI_EC_CHAN_BITMAP +#undef CONFIG_HOST_INTERFACE_ESPI_EC_CHAN_BITMAP /* * Background information (from Intel eSPI Compatibility Specification): @@ -3332,7 +3332,7 @@ * Don't enable this config if the platform implements the Deep-Sx entry as EC * needs to maintain these pins' states per request. */ -#undef CONFIG_HOSTCMD_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST +#undef CONFIG_HOST_INTERFACE_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST /* Base address of low power RAM. */ #undef CONFIG_LPRAM_BASE @@ -5727,7 +5727,7 @@ * The historical default SCI pulse width to the host is 65 microseconds, but * some chipsets may require different widths. */ -#define CONFIG_ESPI_DEFAULT_VW_WIDTH_US 65 +#define CONFIG_HOST_INTERFACE_ESPI_DEFAULT_VW_WIDTH_US 65 /*****************************************************************************/ /* @@ -5753,9 +5753,9 @@ * Define CONFIG_HOST_ESPI_VW_POWER_SIGNAL if any power signals from the host * are configured as virtual wires. */ -#if defined(CONFIG_HOSTCMD_ESPI_VW_SLP_S3) || \ - defined(CONFIG_HOSTCMD_ESPI_VW_SLP_S4) || \ - defined(CONFIG_HOSTCMD_ESPI_VW_SLP_S5) +#if defined(CONFIG_HOSTCMD_ESPI_VW_SLP_S3) || \ + defined(CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S4) || \ + defined(CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S5) #define CONFIG_HOST_ESPI_VW_POWER_SIGNAL #endif @@ -5767,7 +5767,7 @@ * with Key Locker support (TGL+). */ #if defined(CONFIG_POWER_S4_RESIDENCY) && \ - !defined(CONFIG_HOSTCMD_ESPI_VW_SLP_S5) + !defined(CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S5) #error "S4_RESIDENCY needs eSPI support or SLP_S5 routed" #endif @@ -6423,7 +6423,7 @@ #define CONFIG_CHIPSET_X86_RSMRST_DELAY #endif -#if defined(CONFIG_HOSTCMD_ESPI_VW_SLP_S3) && \ +#if defined(CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S3) && \ defined(CONFIG_CHIPSET_SLP_S3_L_OVERRIDE) #error "Cannot use CONFIG_CHIPSET_SLP_S3_L_OVERRIDE if SLP_S3 is a virtual wire" #endif diff --git a/include/power/intel_x86.h b/include/power/intel_x86.h index 4091e18a0a..1fea8ac21d 100644 --- a/include/power/intel_x86.h +++ b/include/power/intel_x86.h @@ -32,12 +32,12 @@ #endif /* GPIO for power signal */ -#ifdef CONFIG_HOSTCMD_ESPI_VW_SLP_S3 +#ifdef CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S3 #define SLP_S3_SIGNAL_L VW_SLP_S3_L #else #define SLP_S3_SIGNAL_L GPIO_PCH_SLP_S3_L #endif -#ifdef CONFIG_HOSTCMD_ESPI_VW_SLP_S4 +#ifdef CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S4 #define SLP_S4_SIGNAL_L VW_SLP_S4_L #else #define SLP_S4_SIGNAL_L GPIO_PCH_SLP_S4_L @@ -48,7 +48,7 @@ * use SLP_S4's GPIO as a proxy for SLP_S5. This matches old behavior and * effectively prevents S4 residency. */ -#ifdef CONFIG_HOSTCMD_ESPI_VW_SLP_S5 +#ifdef CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S5 #define SLP_S5_SIGNAL_L VW_SLP_S5_L #else #define SLP_S5_SIGNAL_L SLP_S4_SIGNAL_L |