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authorKevin K Wong <kevin.k.wong@intel.com>2016-06-20 11:47:02 -0700
committerchrome-bot <chrome-bot@chromium.org>2016-09-13 22:21:33 -0700
commitab967a1c776ca8d847e894cabf66507db2c716d5 (patch)
tree41edd2ac198e0dfb1462c35edaa9f61d33042331 /include
parent9229c795b0c4c262092c754620bf1b2bf8a9f8d7 (diff)
downloadchrome-ec-ab967a1c776ca8d847e894cabf66507db2c716d5.tar.gz
tcpc: Enable vbus discharge using PD discharge registers
BUG=chrome-os-partner:56040 BRANCH=none TEST=Manually tested on Reef. Used scope to monitor VBUS & it dropped to 0.8V within 650ms. Change-Id: Icaea1dc11a7342a5cc1493d6d3c2ec3408d6d37b Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/367482 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'include')
-rw-r--r--include/config.h6
-rw-r--r--include/usb_pd_tcpm.h8
2 files changed, 14 insertions, 0 deletions
diff --git a/include/config.h b/include/config.h
index 608feafbd1..0a9c96d6bc 100644
--- a/include/config.h
+++ b/include/config.h
@@ -1973,6 +1973,12 @@
*/
#undef CONFIG_USB_PD_DISCHARGE_GPIO
+/*
+ * Define (along with CONFIG_USB_PD_DISCHARGE) if discharge circuit is
+ * using PD discharge registers.
+ */
+#undef CONFIG_USB_PD_DISCHARGE_TCPC
+
/* Define if this board can act as a dual-role PD port (source and sink) */
#undef CONFIG_USB_PD_DUAL_ROLE
diff --git a/include/usb_pd_tcpm.h b/include/usb_pd_tcpm.h
index 1b8867d4a9..912e3bbda2 100644
--- a/include/usb_pd_tcpm.h
+++ b/include/usb_pd_tcpm.h
@@ -176,6 +176,14 @@ struct tcpm_drv {
* @param port Type-C port number
*/
void (*tcpc_alert)(int port);
+
+ /**
+ * Discharge PD VBUS on src/sink disconnect & power role swap
+ *
+ * @param port Type-C port number
+ * @param enable Discharge enable or disable
+ */
+ void (*tcpc_discharge_vbus)(int port, int enable);
};
enum tcpc_alert_polarity {