diff options
author | Nadim Taha <ntaha@google.com> | 2016-12-03 21:38:37 -0800 |
---|---|---|
committer | Nadim Taha <ntaha@chromium.org> | 2016-12-07 23:45:29 +0000 |
commit | bfd1aba3cb8441ce05e9f1a7237b2644ffe140e3 (patch) | |
tree | ad302ba3aa30d4bf3b47494f53c3e6917621b339 /include | |
parent | 3e8eb98d7be274b5510d12ff516e1960f1f7aa19 (diff) | |
download | chrome-ec-bfd1aba3cb8441ce05e9f1a7237b2644ffe140e3.tar.gz |
common/spi_nor: Adds RDID and 64KiB erase support
Modified the SPI NOR flash driver to implement
and expose a read JEDEC ID command as well as
support block (64KiB) erase operations.
BUG=None
BRANCH=None
TEST=Built all targets. Tested on two different EEPROMs.
Before:
-------------------------------------------
$ ~/haven_updater$ ./read_jedec_ftdi
[+] JEDEC_ID=0x1940ef
$ ~/haven_updater$ time ./chip_erase_ftdi
[+] Success!
real 4m0.440s
user 0m6.674s
sys 0m11.998s
-------------------------------------------
$ ~/haven_updater$ ./read_jedec_ftdi
[+] JEDEC_ID=0xc21a20c2
$ ~/haven_updater$ time ./chip_erase_ftdi
[+] Success!
real 5m57.291s
user 0m9.964s
sys 0m18.363s
-------------------------------------------
After:
-------------------------------------------
$ ~/haven_updater$ ./read_jedec_ftdi
[+] JEDEC_ID=0x1940ef
$ ~/haven_updater$ time ./chip_erase_ftdi
[+] Success!
real 1m33.176s
user 0m2.327s
sys 0m5.050s
-------------------------------------------
$ ~/haven_updater$ ./read_jedec_ftdi
[+] JEDEC_ID=0xc21a20c2
$ ~/haven_updater$ time ./chip_erase_ftdi
[+] Success!
real 2m41.923s
user 0m4.191s
sys 0m8.576s
-------------------------------------------
Change-Id: Ic20372ca9966499977a52a700d6492d3f648d7b2
Signed-off-by: Nadim Taha <ntaha@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/416903
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/config.h | 3 | ||||
-rw-r--r-- | include/spi_nor.h | 12 |
2 files changed, 15 insertions, 0 deletions
diff --git a/include/config.h b/include/config.h index 39e7667c3c..7519fb6d58 100644 --- a/include/config.h +++ b/include/config.h @@ -1797,6 +1797,9 @@ * two. */ #undef CONFIG_SPI_NOR_MAX_WRITE_SIZE +/* If defined will enable block (64KiB) erase operations. */ +#undef CONFIG_SPI_NOR_BLOCK_ERASE + /* SPI master feature */ #undef CONFIG_SPI_MASTER diff --git a/include/spi_nor.h b/include/spi_nor.h index d6ad93f221..07be853520 100644 --- a/include/spi_nor.h +++ b/include/spi_nor.h @@ -79,6 +79,7 @@ extern const unsigned int spi_nor_devices_used; /* If needed in the future this driver can be extended to discover SFDP * advertised erase sizes and opcodes for SFDP v1.0+. */ #define SPI_NOR_DRIVER_SPECIFIED_OPCODE_4KIB_ERASE 0x20 +#define SPI_NOR_DRIVER_SPECIFIED_OPCODE_64KIB_ERASE 0xd8 /* If needed in the future this driver can be extended to discover 4B entry and * exit methods for SFDP v1.5+. */ @@ -120,6 +121,17 @@ int spi_nor_set_4b_mode(struct spi_nor_device_t *spi_nor_device, int enter_4b_addressing_mode); /** + * Read JEDEC Identifier. + * + * @param spi_nor_device The Serial NOR Flash device to use. + * @param size Number of Bytes to read. + * @param data Destination buffer for data. + * @return ec_error_list (non-zero on error and timeout). + */ +int spi_nor_read_jedec_id(const struct spi_nor_device_t *spi_nor_device, + size_t size, uint8_t *data); + +/** * Read from the Serial NOR Flash device. * * @param spi_nor_device The Serial NOR Flash device to use. |