diff options
| author | Dino Li <dino.li@ite.com.tw> | 2015-10-07 14:49:40 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2015-10-07 17:51:36 -0700 |
| commit | 4bb7c3e2f1c6dc5fcd529c5ca62804c6e271d3ff (patch) | |
| tree | b1873e3b6c7ecf315faf565978adf0d8c22f355d /include | |
| parent | f769f9837ccda37eb9b34750bd317148f6d747e3 (diff) | |
| download | chrome-ec-4bb7c3e2f1c6dc5fcd529c5ca62804c6e271d3ff.tar.gz | |
nds32: fix panic
Support saving panic data for nds32 core.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1. console commands 'crash' and 'panicinfo'.
2. ectool command 'panicinfo'
crash assert
ASSERTION FAILURE '0' in command_crash() at common/panic_output.c:162
=== EXCEP: ITYPE=1 ===
R0 00000000 R1 000000a2 R2 00000060 R3 00000000
R4 00080c40 R5 00000000 R6 dead6663 R7 000000a2
R8 00000002 R9 00000000 R10 00081960 R15 00000000
FP 00000000 GP 000818d8 LP 0000079a SP 00080c60
IPC 000007a2 IPSW 70009
SWID of ITYPE: 0
Software panic reason PANIC_SW_ASSERT
Software panic info 0xa2
Rebooting...
panicinfo
Saved panic data: (NEW)
=== EXCEP: ITYPE=1 ===
R0 00000000 R1 000000a2 R2 00000060 R3 00000000
R4 00080c40 R5 00000000 R6 dead6663 R7 000000a2
R8 00000002 R9 00000000 R10 00081960 R15 00000000
FP 00000000 GP 000818d8 LP 0000079a SP 00080c60
IPC 000007a2 IPSW 70009
SWID of ITYPE: 0
Software panic reason PANIC_SW_ASSERT
Software panic info 0xa2
> crash divzero
=== EXCEP: ITYPE=10003 ===
R0 00000000 R1 00f02705 R2 00000060 R3 00081a09
R4 00000000 R5 00000000 R6 00000001 R7 00080cc0
R8 00000002 R9 00000000 R10 00081961 R15 00000000
FP 00000000 GP 000818d8 LP 00009bce SP 00080c90
IPC 00009bee IPSW 70009
SWID of ITYPE: 1
Exception type: General exception [Arithmetic]
Exception is caused by a data memory access
Rebooting...
panicinfo
Saved panic data: (NEW)
=== EXCEP: ITYPE=10003 ===
R0 00000000 R1 00f02705 R2 00000060 R3 00081a09
R4 00000000 R5 00000000 R6 00000001 R7 00080cc0
R8 00000002 R9 00000000 R10 00081961 R15 00000000
FP 00000000 GP 000818d8 LP 00009bce SP 00080c90
IPC 00009bee IPSW 70009
SWID of ITYPE: 1
Exception type: General exception [Arithmetic]
Exception is caused by a data memory access
> crash stack
+1+2+3+4+5+6+7+8+9+10+11+12+13+14+15+16+17
Stack overflow in CONSOLE task!
=== EXCEP: ITYPE=8 ===
R0 00000002 R1 00000002 R2 00000060 R3 00080458
R4 0000ebdd R5 00000000 R6 dead6661 R7 00000002
R8 00000bc8 R9 00000002 R10 00000000 R15 00000000
FP 00000000 GP 000818d8 LP 0000079a SP 00080448
IPC 00000a92 IPSW 70009
SWID of ITYPE: 0
Software panic reason PANIC_SW_STACK_OVERFLOW
Software panic info 0x2
Rebooting...
panicinfo
Saved panic data: (NEW)
=== EXCEP: ITYPE=8 ===
R0 00000002 R1 00000002 R2 00000060 R3 00080458
R4 0000ebdd R5 00000000 R6 dead6661 R7 00000002
R8 00000bc8 R9 00000002 R10 00000000 R15 00000000
FP 00000000 GP 000818d8 LP 0000079a SP 00080448
IPC 00000a92 IPSW 70009
SWID of ITYPE: 0
Software panic reason PANIC_SW_STACK_OVERFLOW
Software panic info 0x2
> crash watchdog
Pre-watchdog warning! IPC: 00009c6c
panicinfo
Saved panic data: (NEW)
=== EXCEP: ITYPE=0 ===
R0 00000000 R1 00000000 R2 00000000 R3 00000000
R4 00000000 R5 00000000 R6 dead6664 R7 00000000
R8 00000000 R9 00000000 R10 00000000 R15 00000000
FP 00000000 GP 00000000 LP 00000000 SP 00000000
IPC 00009c6c IPSW 00000
SWID of ITYPE: 0
Software panic reason PANIC_SW_WATCHDOG
Software panic info 0x0
>
Change-Id: I3d491ecd0789335db4633f9bf2ca09cf85503ed9
Reviewed-on: https://chromium-review.googlesource.com/303286
Commit-Ready: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/panic.h | 16 |
1 files changed, 14 insertions, 2 deletions
diff --git a/include/panic.h b/include/panic.h index ea7a40f7b0..a4fbf24b92 100644 --- a/include/panic.h +++ b/include/panic.h @@ -29,6 +29,14 @@ struct cortex_panic_data { uint32_t dfsr; }; +/* NDS32 N8 registers saved on panic */ +struct nds32_n8_panic_data { + uint32_t itype; + uint32_t regs[16]; /* r0-r10, r15, fp, gp, lp, sp */ + uint32_t ipc; + uint32_t ipsw; +}; + /* Data saved across reboots */ struct panic_data { uint8_t arch; /* Architecture (PANIC_ARCH_*) */ @@ -38,7 +46,8 @@ struct panic_data { /* core specific panic data */ union { - struct cortex_panic_data cm; /* Cortex-Mx registers */ + struct cortex_panic_data cm; /* Cortex-Mx registers */ + struct nds32_n8_panic_data nds_n8; /* NDS32 N8 registers */ }; /* @@ -50,7 +59,10 @@ struct panic_data { }; #define PANIC_DATA_MAGIC 0x21636e50 /* "Pnc!" */ -#define PANIC_ARCH_CORTEX_M 1 /* Cortex-M architecture */ +enum panic_arch { + PANIC_ARCH_CORTEX_M = 1, /* Cortex-M architecture */ + PANIC_ARCH_NDS32_N8 = 2, /* NDS32 N8 architecture */ +}; /* * Panic data goes at the end of RAM. This is safe because we don't context |