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author | Elthan_Huang <elthan_huang@compal.corp-partner.google.com> | 2018-01-29 10:57:37 +0800 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2018-02-12 18:59:29 -0800 |
commit | db93a8d74c52bc30945120c0f43c527c8af3148c (patch) | |
tree | 216b45ec0f7709b53851cdd01921844b3482d2a1 /include | |
parent | 61e1151d2cdd3247a285a549ffa8fbd68d3597ca (diff) | |
download | chrome-ec-db93a8d74c52bc30945120c0f43c527c8af3148c.tar.gz |
Nami: Enable hibernate using silego
Nami EC has EC_HIBERNATE pin connected to a silego (U91). When this
pin is asserted, U91 shuts down ROP_PMIC_ENVR3, which turns off the
EC. Thus, we don't use the internal hibernate/wake-up feature in npcx.
BUG=b:72641658
BRANCH=none
TEST=Test system will shutdown and doesn't auto
wake up when type hibernate in ec console. And wake up by AC plugin,
LID open, or power button.
Change-Id: Ib9e02f7e41087e5972eedf4855d88a4c45c75bb4
Signed-off-by: Elthan_Huang <elthan_huang@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/890569
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Raymond Chou <raymond_chou@compal.corp-partner.google.com>
Reviewed-by: Raymond Chou <raymond_chou@compal.corp-partner.google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/config.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/config.h b/include/config.h index f091694ec1..a1d197c014 100644 --- a/include/config.h +++ b/include/config.h @@ -1676,6 +1676,12 @@ #undef CONFIG_HIBERNATE_WAKEUP_PINS /* + * If defined, chip hibernation is used. Your board needs to define wake-up + * signals. Undefine this to use board hibernation capability. + */ +#define CONFIG_SUPPORT_CHIP_HIBERNATION + +/* * Use PSL (Power Switch Logic) for hibernating. It turns off VCC power rail * for ultra-low power consumption and uses PSL inputs rely on VSBY power rail * to wake up ec and the whole system. |