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| author | Kevin K Wong <kevin.k.wong@intel.com> | 2016-02-09 15:05:16 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-02-18 17:35:16 -0800 |
| commit | 5efbecb77053b02c6678a26b66f66f39b3499415 (patch) | |
| tree | 782514e12079dfdde912b2ea09e23e98014e448d /power/braswell.c | |
| parent | 2fa3138abea8d97a21af884d499424b62da02812 (diff) | |
| download | chrome-ec-5efbecb77053b02c6678a26b66f66f39b3499415.tar.gz | |
kunimitsu: hibernate: enable PseudoG3 support at board level
this is to move the existing code from chipset level to board level
since PseudoG3 is a board feature that required specific hardware.
BUG=none
BRANCH=glados
TEST=use hibernate command to enter PseudoG3
Change-Id: I309ef89e0ff7057ce46c634baa9791731a771984
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/327677
Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'power/braswell.c')
| -rw-r--r-- | power/braswell.c | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/power/braswell.c b/power/braswell.c index 5998e99339..bfdf3dec39 100644 --- a/power/braswell.c +++ b/power/braswell.c @@ -329,18 +329,3 @@ enum power_state power_handle_state(enum power_state state) } return state; } - -#ifdef CONFIG_LOW_POWER_PSEUDO_G3 -void enter_pseudo_g3(void) -{ - CPRINTS("Enter Psuedo G3"); - cflush(); - - gpio_set_level(GPIO_EC_HIB_L, 1); - gpio_set_level(GPIO_SMC_SHUTDOWN, 1); - - /* Power to EC should shut down now */ - while (1) - ; -} -#endif |