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authorli feng <li1.feng@intel.com>2015-07-07 13:58:24 -0700
committerChromeOS Commit Bot <chromeos-commit-bot@chromium.org>2015-07-14 18:19:38 +0000
commit578f1889af8d689e55e62d163d7da565528ec817 (patch)
tree9e972429f00173b847d5660e1ab4a368b09d80b0 /power/braswell.c
parent776ea6b1189c5c3fec1489bd4f2a66bb0500b2ce (diff)
downloadchrome-ec-578f1889af8d689e55e62d163d7da565528ec817.tar.gz
Strago/Cyan: Change USB power pin name to generic one.
Removed USB enable/disable as it will be handled by HOOK task as CONFIG_USB_PORT_POWER_SMART is enabled. BUG=none TEST=Verified on Acer EVT GPIO USB1_ENABLE and USB2_ENABLE value changed when state switch between S3 and S5. BRANCH=none Change-Id: I85f2047c1a40aebf36743a17d353ff3bc481d867 Signed-off-by: li feng <li1.feng@intel.com> Signed-off-by: Divya Jyothi <divya.jyothi@intel.com> Reviewed-on: https://chromium-review.googlesource.com/283593 Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'power/braswell.c')
-rw-r--r--power/braswell.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/power/braswell.c b/power/braswell.c
index 7ca596a3cf..afd414da51 100644
--- a/power/braswell.c
+++ b/power/braswell.c
@@ -161,9 +161,6 @@ enum power_state power_handle_state(enum power_state state)
break;
case POWER_S5S3:
- /* Turn on the USB power */
- gpio_set_level(GPIO_USB2_PWR_EN, 1);
- gpio_set_level(GPIO_USB3_PWR_EN, 1);
/* Call hooks now that rails are up */
hook_notify(HOOK_CHIPSET_STARTUP);
@@ -287,9 +284,6 @@ enum power_state power_handle_state(enum power_state state)
return POWER_S3;
case POWER_S3S5:
- /* Turn off the USB power */
- gpio_set_level(GPIO_USB2_PWR_EN, 0);
- gpio_set_level(GPIO_USB3_PWR_EN, 0);
/* Call hooks before we remove power rails */
hook_notify(HOOK_CHIPSET_SHUTDOWN);