diff options
| author | Aseda Aboagye <aaboagye@google.com> | 2017-10-24 12:55:09 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-10-26 20:20:59 -0700 |
| commit | 9b28fe366e16bdb7b846f4e5590bb53fb0100186 (patch) | |
| tree | 8576373a74fd62851ad98652f3abb6d69af59ebf /power/cannonlake.h | |
| parent | de63c628223b36f5536f1a69232e8259086e6f1d (diff) | |
| download | chrome-ec-9b28fe366e16bdb7b846f4e5590bb53fb0100186.tar.gz | |
zoombini: cannonlake: Add 5V power good signal.
The 5V power good signal is being removed from the PMIC power good tree,
however, if the 5V power good is not asserted, we should not try booting
to S0. This is because the 1050_STG rail load switch is powered off of
the 5V rail.
Since wireless power control is being moved to the AP, these pins are now
repurposed to control the PMIC enable and for the 5V power good signal.
This commit adds the 5V power good pin to the EC and makes it a required
power signal for S0.
BUG=b:66000679
BRANCH=None
TEST=make -j buildall
TEST=flash zoombini; Verify EC boots up okay.
Change-Id: I8924320030a00b8808aea27fb668451e6e41d590
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/736312
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'power/cannonlake.h')
| -rw-r--r-- | power/cannonlake.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/power/cannonlake.h b/power/cannonlake.h index 404558441f..735f91a2b5 100644 --- a/power/cannonlake.h +++ b/power/cannonlake.h @@ -19,7 +19,8 @@ #define IN_PGOOD_ALL_CORE POWER_SIGNAL_MASK(X86_PMIC_DPWROK) -#define IN_ALL_S0 (IN_PGOOD_ALL_CORE | IN_ALL_PM_SLP_DEASSERTED) +#define IN_ALL_S0 (IN_PGOOD_ALL_CORE | IN_ALL_PM_SLP_DEASSERTED | \ + POWER_SIGNAL_MASK(PP5000_PGOOD)) #define CHIPSET_G3S5_POWERUP_SIGNAL IN_PCH_SLP_SUS_DEASSERTED |