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| author | Furquan Shaikh <furquan@chromium.org> | 2017-10-30 19:41:59 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-10-31 13:04:59 -0700 |
| commit | d4d73eb806a9e480a9565f58f9637a9a669328de (patch) | |
| tree | 403a94b87576f63713fd678a8c8ada8e2ebd69de /power/intel_x86.c | |
| parent | 6f5ef069388fa5cdfb02aaf205d0a8e70f6b677a (diff) | |
| download | chrome-ec-d4d73eb806a9e480a9565f58f9637a9a669328de.tar.gz | |
power: Add default sleep event state HOST_SLEEP_EVENT_DEFAULT_RESET
Instead of using HOST_SLEEP_EVENT_S0IX_RESUME as a reset state to
reinitialize S0ix flag, add a new default state
HOST_SLEEP_EVENT_DEFAULT_RESET. This also allows different parts of
the code to take correct action depending upon the state that is
currently triggered.
BUG=None
BRANCH=None
TEST=Verified that SLP_S0# interrupt doesn't get asserted during
runtime S0ix.
Change-Id: Id6fc8f3b015561d2899a9d39796b77a11a57e758
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/745901
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'power/intel_x86.c')
| -rw-r--r-- | power/intel_x86.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/power/intel_x86.c b/power/intel_x86.c index a5f9754fc4..8a841161e3 100644 --- a/power/intel_x86.c +++ b/power/intel_x86.c @@ -164,7 +164,7 @@ static void handle_chipset_reset(void) { if (chipset_in_state(CHIPSET_STATE_STANDBY)) { CPRINTS("chipset reset: exit s0ix"); - power_reset_host_sleep_state(HOST_SLEEP_EVENT_S0IX_RESUME); + power_reset_host_sleep_state(); task_wake(TASK_ID_CHIPSET); } } @@ -330,7 +330,7 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) * Clearing the S0ix flag on the path to S0 * to handle any reset conditions. */ - power_reset_host_sleep_state(HOST_SLEEP_EVENT_S0IX_RESUME); + power_reset_host_sleep_state(); #endif return POWER_S3; @@ -378,7 +378,7 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) #ifdef CONFIG_POWER_S0IX /* re-init S0ix flag */ - power_reset_host_sleep_state(HOST_SLEEP_EVENT_S0IX_RESUME); + power_reset_host_sleep_state(); #endif return POWER_S3; @@ -505,6 +505,8 @@ void power_chipset_handle_host_sleep_event(enum host_sleep_event state) while (lpc_get_next_host_event() != 0) ; power_signal_disable_interrupt(sleep_sig[SYS_SLEEP_S0IX]); + } else if (state == HOST_SLEEP_EVENT_DEFAULT_RESET) { + power_signal_disable_interrupt(sleep_sig[SYS_SLEEP_S0IX]); } #endif } |