diff options
author | Keith Short <keithshort@chromium.org> | 2019-09-19 15:26:16 -0600 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2019-09-29 17:06:12 +0000 |
commit | c967310d1ec9fdda6b36bd7dfcfa735286fec3c5 (patch) | |
tree | e982ae70e4b577fd74ea5ebfff7a59118e33184e /power/intel_x86.c | |
parent | 946331e651bf333b209c2f3124e3b35b33b11efe (diff) | |
download | chrome-ec-c967310d1ec9fdda6b36bd7dfcfa735286fec3c5.tar.gz |
volteer: Add RTC reset
Add support for the RTC reset on Volteer. This change also deduplicates
the board_rtc_reset() function which was identical on boards that
enabled CONFIG_BOARD_HAS_RTC_RESET.
BUG=b:141321096
BRANCH=none
TEST=make buildall
Change-Id: Ifc6959f8271400174fd4999a3c70800b03b9c2d0
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1816869
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Diffstat (limited to 'power/intel_x86.c')
-rw-r--r-- | power/intel_x86.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/power/intel_x86.c b/power/intel_x86.c index ace891c8b9..c60c1f94e3 100644 --- a/power/intel_x86.c +++ b/power/intel_x86.c @@ -87,6 +87,14 @@ static inline int chipset_get_sleep_signal(enum sys_sleep_state state) } #ifdef CONFIG_BOARD_HAS_RTC_RESET +static void intel_x86_rtc_reset(void) +{ + CPRINTS("Asserting RTCRST# to PCH"); + gpio_set_level(GPIO_PCH_RTCRST, 1); + udelay(100); + gpio_set_level(GPIO_PCH_RTCRST, 0); +} + static enum power_state power_wait_s5_rtc_reset(void) { static int s5_exit_tries; @@ -100,7 +108,7 @@ static enum power_state power_wait_s5_rtc_reset(void) chipset_force_g3(); /* Assert RTCRST# and retry 5 times */ - board_rtc_reset(); + intel_x86_rtc_reset(); if (++s5_exit_tries > 4) { s5_exit_tries = 0; |