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author | Aseda Aboagye <aaboagye@google.com> | 2020-01-07 10:11:03 -0800 |
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committer | Commit Bot <commit-bot@chromium.org> | 2020-01-08 01:58:35 +0000 |
commit | 2b3f8c7a263b90c586b2ec65eac41a09db9dd122 (patch) | |
tree | 3a5d3230ebd5974d83ed1390bd169f02dc3323d8 /power/intel_x86.h | |
parent | 0b838e162b35c6115de2cc049df699a65f9ee019 (diff) | |
download | chrome-ec-2b3f8c7a263b90c586b2ec65eac41a09db9dd122.tar.gz |
icelake: Allow power good methods to be overidden
Jasperlake uses the same chipset driver as Icelake and the dedede
reference design does not have a distinct pins for a couple of the power
good signals. In order to accommodate this, this CL allows some of the
power good signals to be overidden by a board specific implementation.
These power good signals are PG_EC_DSW_PWROK and PG_ALL_SYS_PWRGD.
BUG=b:147257114
BRANCH=None
TEST=`make -j buildall`
Change-Id: I3d889ed9d17bf224a69d1de188fe15933140d606
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1987836
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Diffstat (limited to 'power/intel_x86.h')
-rw-r--r-- | power/intel_x86.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/power/intel_x86.h b/power/intel_x86.h index 3f4d8ff6f0..52accead32 100644 --- a/power/intel_x86.h +++ b/power/intel_x86.h @@ -75,4 +75,20 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state); */ enum ec_error_list intel_x86_wait_power_up_ok(void); +/** + * Get the value of PG_EC_DSW_PWROK. + * + * The default implementation is just to return the GPIO. But if a + * board doesn't have that GPIO, they may override this function. + */ +__override_proto int intel_x86_get_pg_ec_dsw_pwrok(void); + +/** + * Get the value of PG_EC_ALL_SYS_PWRGD. + * + * The default implementation is just to return the GPIO. But if a + * board doesn't have that GPIO, they may override this function. + */ +__override_proto int intel_x86_get_pg_ec_all_sys_pwrgd(void); + #endif /* __CROS_EC_INTEL_X86_H */ |