diff options
| author | Vijay Hiremath <vijay.p.hiremath@intel.com> | 2019-05-30 16:25:15 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2019-06-13 23:02:44 +0000 |
| commit | 8ca44cb4eca69d44e9fce0b93b58be9c7d9d19f3 (patch) | |
| tree | 4913ea0403d24fc4574bfa2941ee4de7e28a000c /power/intel_x86.h | |
| parent | 037eb91f65510d2949289f837c716b7fa997746f (diff) | |
| download | chrome-ec-8ca44cb4eca69d44e9fce0b93b58be9c7d9d19f3.tar.gz | |
intel_x86/power: Consolidate chipset specific power signals array
Currently chipset specific power signals are defined at board/baseboard
level. These power signals are moved to chipset specific file to minimize
the redundant power signals array defined for each board/baseboard.
BUG=b:134079574
BRANCH=none
TEST=make buildall -j
Change-Id: I351904f7cd2e0f27844c0711beb118d390219581
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636837
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Diffstat (limited to 'power/intel_x86.h')
| -rw-r--r-- | power/intel_x86.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/power/intel_x86.h b/power/intel_x86.h index bfbf89538c..452b033838 100644 --- a/power/intel_x86.h +++ b/power/intel_x86.h @@ -9,8 +9,32 @@ #ifndef __CROS_EC_INTEL_X86_H #define __CROS_EC_INTEL_X86_H +#include "espi.h" #include "power.h" +/* Chipset specific header files */ +/* Geminilake and apollolake use same power sequencing. */ +#ifdef CONFIG_CHIPSET_APL_GLK +#include "apollolake.h" +#elif defined(CONFIG_CHIPSET_CANNONLAKE) +#include "cannonlake.h" +#elif defined(CONFIG_CHIPSET_COMETLAKE) +#include "cometlake.h" +#elif defined(CONFIG_CHIPSET_ICELAKE) +#include "icelake.h" +#elif defined(CONFIG_CHIPSET_SKYLAKE) +#include "skylake.h" +#endif + +/* GPIO for power signal */ +#ifdef CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS +#define SLP_S3_SIGNAL_L VW_SLP_S3_L +#define SLP_S4_SIGNAL_L VW_SLP_S4_L +#else +#define SLP_S3_SIGNAL_L GPIO_PCH_SLP_S3_L +#define SLP_S4_SIGNAL_L GPIO_PCH_SLP_S4_L +#endif + /** * Handle RSMRST signal. * |