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| author | Vijay Hiremath <vijay.p.hiremath@intel.com> | 2018-04-03 05:44:52 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-04-03 18:47:12 -0700 |
| commit | a9c7d6b0d73eaf0c48438124b40fc054183701aa (patch) | |
| tree | f921024e21f5e6efd707f0b49a8ad75c7a3bc0ee /power/rk3399.c | |
| parent | 228dc8d1193d2b4c26f60a9da779803bd41fe172 (diff) | |
| download | chrome-ec-a9c7d6b0d73eaf0c48438124b40fc054183701aa.tar.gz | |
Code cleanup: Remove cold reset logic
Majority of the chipsets do not have a dedicated GPIO to trigger
AP cold reset. Current code either ignores cold reset or does a warm
reset instead or have a work around to put AP in S5 and then bring
back to S0. In order to avoid the confusion, removed the cold reset
logic and only apreset is used hence forth.
BUG=b:72426192
BRANCH=none
TEST=make buildall -j
Manually tested on GLKRVP, apreset EC command can reset AP.
Change-Id: Ie32d34f2f327ff1b61b32a4d874250dce024cf35
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/991052
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'power/rk3399.c')
| -rw-r--r-- | power/rk3399.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/power/rk3399.c b/power/rk3399.c index 51211d0c69..2c8a5e9e96 100644 --- a/power/rk3399.c +++ b/power/rk3399.c @@ -220,14 +220,13 @@ void chipset_force_shutdown(void) } #define SYS_RST_HOLD_US (1 * MSEC) -void chipset_reset(int cold_reset) +void chipset_reset(void) { #ifdef CONFIG_CMD_RTC /* Print out the RTC to help correlate resets in logs. */ print_system_rtc(CC_CHIPSET); #endif - /* TODO: handle cold_reset */ - CPRINTS("%s(%d)", __func__, cold_reset); + CPRINTS("%s", __func__); /* Pulse SYS_RST */ gpio_set_level(GPIO_SYS_RST_L, 0); |