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| author | Caesar Wang <wxt@rock-chips.com> | 2017-09-01 16:06:17 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-09-07 12:56:29 -0700 |
| commit | 098bde322f5678a879bb8d181edfec9840f23e1c (patch) | |
| tree | 6b9951e41e7138e24aa33fb466548d2b379a650f /power/rk3399.c | |
| parent | f31ee0c829a8f8fb7f999f6c67d50f9da5bb6989 (diff) | |
| download | chrome-ec-098bde322f5678a879bb8d181edfec9840f23e1c.tar.gz | |
power/rk3399: Don't turn off the pp900_s0 during s3
The PP900_LOGIC can't be disabled for now, maybe we will disable it in
later, since the ATF hadn't done it.
In order to the suspend to resume function is fine, let's keep it first.
BRANCH=none
BUG=b:65270978
TEST=build and run the S2R stress tests on nefario board
Change-Id: I932ee2b7667115df7516729f60faa71598f36d93
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/647053
Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'power/rk3399.c')
| -rw-r--r-- | power/rk3399.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/power/rk3399.c b/power/rk3399.c index 15181844e7..9d90482ba4 100644 --- a/power/rk3399.c +++ b/power/rk3399.c @@ -95,6 +95,7 @@ static const struct power_seq_op s5s3_power_seq[] = { }; #elif CONFIG_CHIPSET_POWER_SEQ_VERSION == 3 static const struct power_seq_op s5s3_power_seq[] = { + { GPIO_PP900_S0_EN, 1, 2 }, { GPIO_PP900_S3_EN, 1, 2 }, { GPIO_SYS_RST_L, 0, 0 }, { GPIO_PP1800_PMU_EN_L, 0, 2 }, @@ -134,7 +135,7 @@ static const struct power_seq_op s3s0_power_seq[] = { }; #elif CONFIG_CHIPSET_POWER_SEQ_VERSION == 3 static const struct power_seq_op s3s0_power_seq[] = { - { GPIO_PP900_S0_EN, 1, 2 }, + /* TODO(b/65270978): add GPIO_PP900_S0_EN control later. */ { GPIO_PP1800_AP_AVDD_EN_L, 0, 2 }, { GPIO_AP_CORE_EN, 1, 2 }, { GPIO_PP1800_S0_EN_L, 0, 2 }, @@ -158,7 +159,6 @@ static const struct power_seq_op s3s0_power_seq[] = { #ifdef S3_USB_WAKE /* Sigs that may already be on in S3, if we need to wake-on-USB */ static const struct power_seq_op s3s0_usb_wake_power_seq[] = { - { GPIO_PP900_S0_EN, 1, 2 }, { GPIO_PP1800_USB_EN, 1, 2 }, { GPIO_PP3300_S0_EN, 1, 2 }, }; @@ -180,7 +180,6 @@ static const struct power_seq_op s0s3_power_seq[] = { { GPIO_PP1800_S0_EN_L, 1, 1 }, { GPIO_AP_CORE_EN, 0, 20 }, { GPIO_PP1800_AP_AVDD_EN_L, 1, 1 }, - { GPIO_PP900_S0_EN, 0, 0 }, }; #else static const struct power_seq_op s0s3_power_seq[] = { @@ -198,7 +197,6 @@ static const struct power_seq_op s0s3_power_seq[] = { static const struct power_seq_op s0s3_usb_wake_power_seq[] = { { GPIO_PP3300_S0_EN, 0, 20 }, { GPIO_PP1800_USB_EN, 0, 1 }, - { GPIO_PP900_S0_EN, 0, 1 }, }; #endif @@ -218,6 +216,7 @@ static const struct power_seq_op s3s5_power_seq[] = { { GPIO_LPDDR_PWR_EN, 0, 20 }, { GPIO_PP1800_PMU_EN_L, 1, 2 }, { GPIO_PP900_S3_EN, 0, 0 }, + { GPIO_PP900_S0_EN, 0, 0 }, }; #else static const struct power_seq_op s3s5_power_seq[] = { |