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| author | Wai-Hong Tam <waihong@google.com> | 2018-11-09 14:39:52 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-12-09 00:48:16 -0800 |
| commit | a47d02a9411d5ec2e6397eaf9ec0b8a73aebaa29 (patch) | |
| tree | 4b087b09acd8d8b857d5a6aaf316fa3348788119 /power/sdm845.c | |
| parent | 2acbffc2ba687e17f603d458bdef904eb5a8be97 (diff) | |
| download | chrome-ec-a47d02a9411d5ec2e6397eaf9ec0b8a73aebaa29.tar.gz | |
cheza: When warm_reset-toggling finished, issue a request to reset
When warm_reset-toggling finished, don't call the chipset_reset()
function, which will be changed to do a warm reset, do issue a
request to initiate a reset sequence.
BRANCH=none
BUG=b:117941911
TEST=Tried "dut-control warm_reset:on" and "dut-control warm_reset:off"
during firmware (PMIC registers not programmed) and userspace (PMIC
registers reprogrammed). Checked doing S0 -> S5 -> S0 transition.
Change-Id: I6011fa6bfc9c5b60807bcbef6326b13a2983b37f
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1330116
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Diffstat (limited to 'power/sdm845.c')
| -rw-r--r-- | power/sdm845.c | 35 |
1 files changed, 10 insertions, 25 deletions
diff --git a/power/sdm845.c b/power/sdm845.c index 42cc9843ae..9fb4bcd141 100644 --- a/power/sdm845.c +++ b/power/sdm845.c @@ -138,6 +138,13 @@ enum power_on_event_t { POWER_ON_EVENT_COUNT, }; +/* Issue a request to initiate a reset sequence */ +static void request_cold_reset(void) +{ + power_request = POWER_REQ_RESET; + task_wake(TASK_ID_CHIPSET); +} + /* AP-requested reset GPIO interrupt handlers */ static void chipset_reset_request_handler(void) { @@ -151,26 +158,6 @@ void chipset_reset_request_interrupt(enum gpio_signal signal) hook_call_deferred(&chipset_reset_request_handler_data, 0); } -/* Cold reset AP after warm_reset-toggling finished */ -static void chipset_warm_reset_finished(void) -{ - CPRINTS("warm_reset-toggling finished -> cold reset AP"); - chipset_reset(CHIPSET_RESET_AP_REQ); - - if (ap_rst_overdriven) { - /* - * This condition should not be reached as the above - * chipset_reset() makes POWER_GOOD drop that triggers an - * interrupt to high-Z both AP_RST_L and PS_HOLD. - */ - CPRINTS("Fatal: AP_RST_L and PS_HOLD not released. Force it!"); - gpio_set_flags(GPIO_AP_RST_L, GPIO_INT_BOTH | GPIO_SEL_1P8V); - gpio_set_flags(GPIO_PS_HOLD, GPIO_INT_BOTH | GPIO_SEL_1P8V); - ap_rst_overdriven = 0; - } -} -DECLARE_DEFERRED(chipset_warm_reset_finished); - void chipset_warm_reset_interrupt(enum gpio_signal signal) { /* @@ -212,12 +199,12 @@ void chipset_warm_reset_interrupt(enum gpio_signal signal) * Servo or Cr50 releases the WARM_RESET_L signal. * * Cold reset the PMIC, doing S0->S5->S0 transition, + * by issuing a request to initiate a reset sequence, * to recover the system. The transition to S5 makes * POWER_GOOD drop that triggers an interrupt to * high-Z both AP_RST_L and PS_HOLD. */ - hook_call_deferred(&chipset_warm_reset_finished_data, - 0); + request_cold_reset(); } /* If not overdriven, just a normal power-up, do nothing. */ } @@ -690,9 +677,7 @@ void chipset_reset(enum chipset_reset_reason reason) CPRINTS("%s(%d)", __func__, reason); report_ap_reset(reason); - /* Issue a request to initiate a reset sequence */ - power_request = POWER_REQ_RESET; - task_wake(TASK_ID_CHIPSET); + request_cold_reset(); } /** |