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| author | Vijay Hiremath <vijay.p.hiremath@intel.com> | 2019-05-30 16:25:15 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2019-06-13 23:02:44 +0000 |
| commit | 8ca44cb4eca69d44e9fce0b93b58be9c7d9d19f3 (patch) | |
| tree | 4913ea0403d24fc4574bfa2941ee4de7e28a000c /power/skylake.c | |
| parent | 037eb91f65510d2949289f837c716b7fa997746f (diff) | |
| download | chrome-ec-8ca44cb4eca69d44e9fce0b93b58be9c7d9d19f3.tar.gz | |
intel_x86/power: Consolidate chipset specific power signals array
Currently chipset specific power signals are defined at board/baseboard
level. These power signals are moved to chipset specific file to minimize
the redundant power signals array defined for each board/baseboard.
BUG=b:134079574
BRANCH=none
TEST=make buildall -j
Change-Id: I351904f7cd2e0f27844c0711beb118d390219581
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636837
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Diffstat (limited to 'power/skylake.c')
| -rw-r--r-- | power/skylake.c | 38 |
1 files changed, 37 insertions, 1 deletions
diff --git a/power/skylake.c b/power/skylake.c index a5cf6aa0a5..ce6b823b5e 100644 --- a/power/skylake.c +++ b/power/skylake.c @@ -13,7 +13,6 @@ #include "lpc.h" #include "panic.h" #include "power_button.h" -#include "skylake.h" #include "system.h" #include "timer.h" @@ -22,6 +21,43 @@ static int forcing_shutdown; /* Forced shutdown in progress? */ +/* Power signals list. Must match order of enum power_signal. */ +const struct power_signal_info power_signal_list[] = { +#ifdef CONFIG_POWER_S0IX + [X86_SLP_S0_DEASSERTED] = { + GPIO_PCH_SLP_S0_L, + POWER_SIGNAL_ACTIVE_HIGH | POWER_SIGNAL_DISABLE_AT_BOOT, + "SLP_S0_DEASSERTED", + }, +#endif + [X86_SLP_S3_DEASSERTED] = { + SLP_S3_SIGNAL_L, + POWER_SIGNAL_ACTIVE_HIGH, + "SLP_S3_DEASSERTED", + }, + [X86_SLP_S4_DEASSERTED] = { + SLP_S4_SIGNAL_L, + POWER_SIGNAL_ACTIVE_HIGH, + "SLP_S4_DEASSERTED", + }, + [X86_SLP_SUS_DEASSERTED] = { + GPIO_PCH_SLP_SUS_L, + POWER_SIGNAL_ACTIVE_HIGH, + "SLP_SUS_DEASSERTED", + }, + [X86_RSMRST_L_PWRGD] = { + GPIO_RSMRST_L_PGOOD, + POWER_SIGNAL_ACTIVE_HIGH, + "RSMRST_N_PWRGD", + }, + [X86_PMIC_DPWROK] = { + GPIO_PMIC_DPWROK, + POWER_SIGNAL_ACTIVE_HIGH, + "PMIC_DPWROK", + }, +}; +BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); + void chipset_force_shutdown(enum chipset_shutdown_reason reason) { |