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| author | Jack Rosenthal <jrosenth@chromium.org> | 2022-06-27 15:18:33 -0600 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-07-01 02:34:32 +0000 |
| commit | bb5170bf59d2d69ff48f837d6ee0a84e265262a9 (patch) | |
| tree | f8af3af881ac103a42b671fbdfaef95f4079ca86 /power | |
| parent | 5a4d7b929b87d4c82dae6d5fd56782ea71d06b9e (diff) | |
| download | chrome-ec-bb5170bf59d2d69ff48f837d6ee0a84e265262a9.tar.gz | |
power/cometlake-discrete.c: Format with clang-format
BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I3e4a741dd37981bb58123d0f67bcde81e925c55a
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3730462
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Diffstat (limited to 'power')
| -rw-r--r-- | power/cometlake-discrete.c | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/power/cometlake-discrete.c b/power/cometlake-discrete.c index a22e32a69f..b731f56bda 100644 --- a/power/cometlake-discrete.c +++ b/power/cometlake-discrete.c @@ -217,7 +217,9 @@ void chipset_force_shutdown(enum chipset_shutdown_reason reason) shutdown_s5_rails(); } -void chipset_handle_espi_reset_assert(void) {} +void chipset_handle_espi_reset_assert(void) +{ +} enum power_state chipset_force_g3(void) { @@ -303,7 +305,7 @@ enum power_state power_handle_state(enum power_state state) if (power_wait_signals(POWER_SIGNAL_MASK(PP1800_A_PGOOD) | POWER_SIGNAL_MASK(PP1050_A_PGOOD))) return pgood_timeout(POWER_S5G3); - msleep(10); /* tPCH03: VCCPRIM good -> RSMRST >10ms */ + msleep(10); /* tPCH03: VCCPRIM good -> RSMRST >10ms */ gpio_set_level(GPIO_PCH_RSMRST_L, 1); break; @@ -383,7 +385,9 @@ enum power_state power_handle_state(enum power_state state) * implies power sequencing is all-off and we don't have any external * PMIC to synchronize state with. */ -void chipset_handle_reboot(void) {} +void chipset_handle_reboot(void) +{ +} #endif /* CONFIG_VBOOT_EFS */ void c10_gate_interrupt(enum gpio_signal signal) @@ -406,8 +410,8 @@ void c10_gate_interrupt(enum gpio_signal signal) void slp_s3_interrupt(enum gpio_signal signal) { - if (!gpio_get_level(GPIO_SLP_S3_L) - && chipset_in_state(CHIPSET_STATE_ON)) { + if (!gpio_get_level(GPIO_SLP_S3_L) && + chipset_in_state(CHIPSET_STATE_ON)) { /* Falling edge on SLP_S3_L means dropping to S3 from S0 */ shutdown_s0_rails(); } |