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author | Eric Yilun Lin <yllin@chromium.org> | 2023-02-24 17:28:50 +0800 |
---|---|---|
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2023-03-10 10:04:17 +0000 |
commit | 74b84f2cf60cc3283ff8c9f78e9f184926d530a1 (patch) | |
tree | 11f1a249da54d47b379f0c3d5c6a3d108258d51d /power | |
parent | bb81074e186639fed7d15faf64de03c2fe45ffc7 (diff) | |
download | chrome-ec-74b84f2cf60cc3283ff8c9f78e9f184926d530a1.tar.gz |
mt8188: fix PP4200_S5 enable/disable timing
The timing on/off timing should be moved to G3S5 and S5G3 to
align the S5 naming.
BUG=b:267268982
TEST=ensure the PG_PP4200_S5 is on/off at S5 state
BRANCH=none
Change-Id: I2ad6631125216a1400d169064389de38b1e1a60b
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4271050
Commit-Queue: Eric Yilun Lin <yllin@google.com>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Tested-by: Eric Yilun Lin <yllin@google.com>
Diffstat (limited to 'power')
-rw-r--r-- | power/mt8186.c | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/power/mt8186.c b/power/mt8186.c index e6f104125e..bcaaa115df 100644 --- a/power/mt8186.c +++ b/power/mt8186.c @@ -326,6 +326,13 @@ enum power_state power_handle_state(enum power_state state) break; case POWER_G3S5: +#if DT_NODE_EXISTS(DT_NODELABEL(en_pp4200_s5)) + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(en_pp4200_s5), 1); + if (power_wait_mask_signals_timeout(IN_PG_PP4200_S5, + IN_PG_PP4200_S5, + PG_PP4200_S5_DELAY)) + return POWER_S5G3; +#endif return POWER_S5; case POWER_S5S3: @@ -337,13 +344,6 @@ enum power_state power_handle_state(enum power_state state) power_signal_enable_interrupt(GPIO_AP_EC_WDTRST_L); power_signal_enable_interrupt(GPIO_AP_EC_WARM_RST_REQ); -#if DT_NODE_EXISTS(DT_NODELABEL(en_pp4200_s5)) - gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(en_pp4200_s5), 1); - - if (power_wait_mask_signals_timeout(PG_PP4200_S5, PG_PP4200_S5, - PG_PP4200_S5_DELAY)) - return POWER_S5G3; -#endif set_pmic_pwron(); GPIO_SET_LEVEL(GPIO_SYS_RST_ODL, 1); @@ -422,16 +422,15 @@ enum power_state power_handle_state(enum power_state state) if (is_shutdown) set_pmic_pwroff(); -#if DT_NODE_EXISTS(DT_NODELABEL(en_pp4200_s5)) - gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(en_pp4200_s5), 0); -#endif - hook_notify(HOOK_CHIPSET_SHUTDOWN_COMPLETE); is_shutdown = false; return POWER_S5; case POWER_S5G3: +#if DT_NODE_EXISTS(DT_NODELABEL(en_pp4200_s5)) + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(en_pp4200_s5), 0); +#endif return POWER_G3; default: CPRINTS("Unexpected power state %d", state); |