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| author | Rajesh Kumar <rajesh3.kumar@intel.com> | 2022-07-29 15:19:37 -0700 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-12-02 22:55:39 +0000 |
| commit | c8325ba18b9f4d5b1f3f3bc739e83d8f591308cf (patch) | |
| tree | 48ee272334e7febcd979d0086b46940a1f74fd13 /power | |
| parent | 9f6d6ca10611cd1af3d81534baa674db335a4dc0 (diff) | |
| download | chrome-ec-c8325ba18b9f4d5b1f3f3bc739e83d8f591308cf.tar.gz | |
ec: Support logging system boot time info
This CL add support logging system boot time and hostcommand to get
boot time info.
EC logs elapsed time (in micro second) info since boot for different
signal events,that can be used to calculate system boot time in cold
boot and warm boot scenarios.
Below are the events when EC logs time info
ARAIL EC turns on A-RAIL
RSMRST EC releases RSMRST#
ESPIRST ESPIRST received
PLTRST_LOW PLTRST# asserted
PLTRST_HIGH PLTRST# deasserted
EC_CUR_TIME EC current time
cnt increments on every warm reboot and reset to 0 on
cold reboot
BUG=b:249163956
BRANCH=none
TEST='ectool boottime' AP console command is used to fetch data
'reboot' on AP console to trigger warm reboot
'apshutdown' on EC console to trigger cold reboot
Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com>
Change-Id: I15fedbde252e0452270ef0e3fd4391bf624169f1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3794612
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
Diffstat (limited to 'power')
| -rw-r--r-- | power/alderlake_slg4bd44540.c | 3 | ||||
| -rw-r--r-- | power/icelake.c | 4 | ||||
| -rw-r--r-- | power/intel_x86.c | 3 |
3 files changed, 10 insertions, 0 deletions
diff --git a/power/alderlake_slg4bd44540.c b/power/alderlake_slg4bd44540.c index ccc260c289..09ba6f01e6 100644 --- a/power/alderlake_slg4bd44540.c +++ b/power/alderlake_slg4bd44540.c @@ -16,6 +16,7 @@ #include "power.h" #include "power/alderlake_slg4bd44540.h" #include "power/intel_x86.h" +#include "system_boot_time.h" #include "timer.h" /* @@ -256,6 +257,8 @@ enum power_state power_handle_state(enum power_state state) case POWER_G3S5: GPIO_SET_LEVEL(GPIO_EN_S5_RAILS, 1); + update_ap_boot_time(ARAIL); + if (power_wait_signals(IN_PGOOD_ALL_CORE)) break; diff --git a/power/icelake.c b/power/icelake.c index e81a6f6942..7d60e26f40 100644 --- a/power/icelake.c +++ b/power/icelake.c @@ -13,6 +13,7 @@ #include "power.h" #include "power/intel_x86.h" #include "power_button.h" +#include "system_boot_time.h" #include "task.h" #include "timer.h" @@ -280,6 +281,9 @@ enum power_state power_handle_state(enum power_state state) */ /* Turn on the PP3300_DSW rail. */ GPIO_SET_LEVEL(GPIO_EN_PP3300_A, 1); + + update_ap_boot_time(ARAIL); + if (power_wait_signals(IN_PGOOD_ALL_CORE)) break; diff --git a/power/intel_x86.c b/power/intel_x86.c index 4fa3aa3c8e..223942f897 100644 --- a/power/intel_x86.c +++ b/power/intel_x86.c @@ -17,6 +17,7 @@ #include "power/intel_x86.h" #include "power_button.h" #include "system.h" +#include "system_boot_time.h" #include "task.h" #include "util.h" #include "vboot.h" @@ -583,6 +584,8 @@ void common_intel_x86_handle_rsmrst(enum power_state state) gpio_set_level(GPIO_PCH_RSMRST_L, rsmrst_in); + update_ap_boot_time(RSMRST); + CPRINTS("Pass through GPIO_PG_EC_RSMRST_ODL: %d", rsmrst_in); board_after_rsmrst(rsmrst_in); |