summaryrefslogtreecommitdiff
path: root/power
diff options
context:
space:
mode:
authorphilipchen <philipchen@google.com>2017-01-27 11:57:18 -0800
committerchrome-bot <chrome-bot@chromium.org>2017-06-08 16:39:37 -0700
commit07c4c09b0b8ffe64b6b9c2f4d704709eed677d7f (patch)
tree9c66fb8209da437c7b53e5a4636326286b95d3d9 /power
parent62df2b1b8ae3310168f19ec26a5738c7b8646879 (diff)
downloadchrome-ec-07c4c09b0b8ffe64b6b9c2f4d704709eed677d7f.tar.gz
scarlet: modify power-on sequence
Merge PP900_USB_EN, PP900_PLL_EN, and PP900_PMU_EN. Add a new config flag to enable different power-on sequences on one SOC. BUG=chrome-os-partner:62207, b:62307687 BRANCH=gru TEST=build kevin/gru/scarlet Change-Id: Iec3082384aa321636c59169b2bc55f773463f3d0 Reviewed-on: https://chromium-review.googlesource.com/434158 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/524979 Commit-Ready: Philip Chen <philipchen@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org>
Diffstat (limited to 'power')
-rw-r--r--power/rk3399.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/power/rk3399.c b/power/rk3399.c
index 960da80b3a..b5e9bdd1ee 100644
--- a/power/rk3399.c
+++ b/power/rk3399.c
@@ -5,6 +5,14 @@
/* rk3399 chipset power control module for Chrome EC */
+/*
+ * The description of each CONFIG_CHIPSET_POWER_SEQ_VERSION:
+ *
+ * Version 0: Initial/default revision.
+ * Version 1: Control signals PP900_PLL_EN and PP900_PMU_EN
+ * are merged with PP900_USB_EN.
+ */
+
#include "charge_state.h"
#include "chipset.h"
#include "common.h"
@@ -204,8 +212,10 @@ enum power_state power_handle_state(enum power_state state)
gpio_set_level(GPIO_PP900_AP_EN, 1);
gpio_set_level(GPIO_PP900_PCIE_EN, 1);
msleep(2);
+#if CONFIG_CHIPSET_POWER_SEQ_VERSION == 0
gpio_set_level(GPIO_PP900_PMU_EN, 1);
gpio_set_level(GPIO_PP900_PLL_EN, 1);
+#endif
gpio_set_level(GPIO_PP900_USB_EN, 1);
msleep(2);
@@ -342,8 +352,10 @@ enum power_state power_handle_state(enum power_state state)
gpio_set_level(GPIO_PP1800_PMU_EN_L, 1);
msleep(2);
gpio_set_level(GPIO_PP900_USB_EN, 0);
+#if CONFIG_CHIPSET_POWER_SEQ_VERSION == 0
gpio_set_level(GPIO_PP900_PLL_EN, 0);
gpio_set_level(GPIO_PP900_PMU_EN, 0);
+#endif
msleep(6);
gpio_set_level(GPIO_PP900_PCIE_EN, 0);
gpio_set_level(GPIO_PP900_AP_EN, 0);