diff options
| author | Vijay Hiremath <vijay.p.hiremath@intel.com> | 2018-03-21 13:54:59 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-03-25 00:50:39 -0700 |
| commit | e94bf79f85a74f6c6bd6f4b4bc258abf2ea7e586 (patch) | |
| tree | f74a7aad57354fda48a588a74a3e0f85f22381b8 /power | |
| parent | 286dfbd0c9bb71100cccde2c55f602b96cf1d211 (diff) | |
| download | chrome-ec-e94bf79f85a74f6c6bd6f4b4bc258abf2ea7e586.tar.gz | |
apollolake: Remove AP cold reset logic
In APL & GLK, cold reset code does a AP force shutdown (with board
specific AP shutdown code) by power sequencing the SOC all the way
to S5 and bring it back to S0. However there is no separate GPIO
in APL & GLK for doing AP cold reset hence removed the AP cold
reset logic.
BUG=b:72426192
BRANCH=none
TEST=make buildall -j
Manually verified on GLKRVP, apreset cold & warm behave same
Change-Id: I6ee5e4c4df94e685acdabe31b8b5554295883792
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/974107
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Diffstat (limited to 'power')
| -rw-r--r-- | power/apollolake.c | 37 |
1 files changed, 8 insertions, 29 deletions
diff --git a/power/apollolake.c b/power/apollolake.c index aab850b332..5e3aa3d33f 100644 --- a/power/apollolake.c +++ b/power/apollolake.c @@ -14,8 +14,6 @@ /* Console output macros */ #define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) -static int forcing_coldreset; /* Forced coldreset in progress? */ - __attribute__((weak)) void chipset_do_shutdown(void) { /* Need to implement board specific shutdown */ @@ -23,8 +21,7 @@ __attribute__((weak)) void chipset_do_shutdown(void) void chipset_force_shutdown(void) { - if (!forcing_coldreset) - CPRINTS("%s()", __func__); + CPRINTS("%s()", __func__); chipset_do_shutdown(); } @@ -33,12 +30,6 @@ enum power_state chipset_force_g3(void) { chipset_force_shutdown(); - /* Power up the platform again for forced cold reset */ - if (forcing_coldreset) { - forcing_coldreset = 0; - return POWER_G3S5; - } - return POWER_G3; } @@ -48,23 +39,14 @@ void chipset_handle_espi_reset_assert(void) void chipset_reset(int cold_reset) { - CPRINTS("%s(%d)", __func__, cold_reset); - if (cold_reset) { - /* - * Perform chipset_force_shutdown and mark forcing_coldreset. - * Once in S5G3 state, check forcing_coldreset to power up. - */ - forcing_coldreset = 1; + CPRINTS("%s", __func__); - chipset_force_shutdown(); - } else { - /* - * Send a pulse to SOC PMU_RSTBTN_N to trigger a warm reset. - */ - gpio_set_level(GPIO_SYS_RESET_L, 0); - usleep(32 * MSEC); - gpio_set_level(GPIO_SYS_RESET_L, 1); - } + /* + * Send a pulse to SOC PMU_RSTBTN_N to trigger a warm reset. + */ + gpio_set_level(GPIO_SYS_RESET_L, 0); + usleep(32 * MSEC); + gpio_set_level(GPIO_SYS_RESET_L, 1); } static void handle_all_sys_pgood(enum power_state state) @@ -99,9 +81,6 @@ enum power_state power_handle_state(enum power_state state) new_state = POWER_S5G3; goto rsmrst_handle; - } else if (state == POWER_G3S5) { - /* Platform is powering up, clear forcing_coldreset */ - forcing_coldreset = 0; } new_state = common_intel_x86_power_handle_state(state); |