diff options
| author | Mary Ruthven <mruthven@chromium.org> | 2016-07-28 10:47:06 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-07-28 20:19:48 -0700 |
| commit | 4b202194e9e7774f8f333e8a69a11fa0f87b369f (patch) | |
| tree | a7f3c943328b9c130d09e7fddbfe4dc92445f18f /power | |
| parent | c3fe992ed87d3e36cdaf6c226ca3357bd7eda8c8 (diff) | |
| download | chrome-ec-4b202194e9e7774f8f333e8a69a11fa0f87b369f.tar.gz | |
kevin: increase the delay in chipset_reset
Cr50 has sys_rst_l as a wake source, but it can't tell which pin woke it
on resume. To know the source it has to check the value of the pin on
resume. This change makes the delay long enough for Cr50 to resume and
check that sys_rst_is asserted.
BUG=chrome-os-partner:55674
BUG=b:30308276
BRANCH=none
TEST=enable sleep on cr50 and verify apreset still reset it
Change-Id: I8e088c5f13a4222142161d8b79550dfc6eb529d6
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/364170
Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'power')
| -rw-r--r-- | power/rk3399.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/power/rk3399.c b/power/rk3399.c index 720ec09151..aaac134d88 100644 --- a/power/rk3399.c +++ b/power/rk3399.c @@ -68,7 +68,7 @@ void chipset_reset(int cold_reset) /* Pulse SYS_RST */ gpio_set_level(GPIO_SYS_RST_L, 0); - udelay(10); + udelay(90); gpio_set_level(GPIO_SYS_RST_L, 1); } |