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| author | Rob Barnes <robbarnes@google.com> | 2021-04-22 17:12:21 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-04-27 23:31:43 +0000 |
| commit | 56ec4df1a9df67bdda1915fe0e5be114e108fdc6 (patch) | |
| tree | d05caee6bbf425b68328a60094100fdb8e27772b /power | |
| parent | 73886cddb0eb255072848e2d071707976729be03 (diff) | |
| download | chrome-ec-56ec4df1a9df67bdda1915fe0e5be114e108fdc6.tar.gz | |
amd_x86: Check for S0ix before S3
Cezanne is asserting both SLP_S0 and SLP_S3 for S0ix. On Intel only
SLP_S3 is asserted. Move check for S0ix before check for S0 so EC enters
correct power state.
BUG=b:186135411
TEST=EC reports S0ix power state
BRANCH=None
Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: I47ede14e8031ba4d6a01399f2501801e597a6b1f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2847332
Reviewed-by: Diana Z <dzigterman@chromium.org>
Diffstat (limited to 'power')
| -rw-r--r-- | power/amd_x86.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/power/amd_x86.c b/power/amd_x86.c index b4030d0594..5436c6c9e1 100644 --- a/power/amd_x86.c +++ b/power/amd_x86.c @@ -413,9 +413,6 @@ enum power_state power_handle_state(enum power_state state) if (!power_has_signals(IN_S5_PGOOD)) { /* Required rail went away */ return POWER_S5G3; - } else if (gpio_get_level(GPIO_PCH_SLP_S3_L) == 0) { - /* Power down to next state */ - return POWER_S0S3; } #ifdef CONFIG_POWER_S0IX /* @@ -430,6 +427,12 @@ enum power_state power_handle_state(enum power_state state) gpio_get_level(GPIO_PCH_SLP_S0_L) == 0) { return POWER_S0S0ix; } +#endif + else if (gpio_get_level(GPIO_PCH_SLP_S3_L) == 0) { + /* Power down to next state */ + return POWER_S0S3; + } +#ifdef CONFIG_POWER_S0IX /* * Call hooks only if we haven't notified listeners of S0ix * resume. |