icelake: Allow power good methods to be overidden

Jasperlake uses the same chipset driver as Icelake and the dedede
reference design does not have a distinct pins for a couple of the power
good signals. In order to accommodate this, this CL allows some of the
power good signals to be overidden by a board specific implementation.
These power good signals are PG_EC_DSW_PWROK and PG_ALL_SYS_PWRGD.

BUG=b:147257114
BRANCH=None
TEST=`make -j buildall`

Change-Id: I3d889ed9d17bf224a69d1de188fe15933140d606
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1987836
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>

2 files changed, 30 insertions, 4 deletions

diff --git a/power/icelake.c b/power/icelake.c
index 99981e32a4..50858ff0d2 100644
--- a/power/icelake.c
+++ b/power/icelake.c
@@ -71,6 +71,16 @@ const struct power_signal_info power_signal_list[] = {
 };
 BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);
 
+__overridable int intel_x86_get_pg_ec_dsw_pwrok(void)
+{
+	return gpio_get_level(GPIO_PG_EC_DSW_PWROK);
+}
+
+__overridable int intel_x86_get_pg_ec_all_sys_pwrgd(void)
+{
+	return gpio_get_level(GPIO_PG_EC_ALL_SYS_PWRGD);
+}
+
 void chipset_force_shutdown(enum chipset_shutdown_reason reason)
 {
 	int timeout_ms = 50;
@@ -98,7 +108,7 @@ void chipset_force_shutdown(enum chipset_shutdown_reason reason)
 	 * power_wait_signals_timeout()
 	 */
 	/* Now wait for DSW_PWROK and  RSMRST_ODL to go away. */
-	while (gpio_get_level(GPIO_PG_EC_DSW_PWROK) &&
+	while (intel_x86_get_pg_ec_dsw_pwrok() &&
 	       gpio_get_level(GPIO_PG_EC_RSMRST_ODL) && (timeout_ms > 0)) {
 		msleep(1);
 		timeout_ms--;
@@ -151,7 +161,7 @@ static void enable_pp5000_rail(void)
 
 enum power_state power_handle_state(enum power_state state)
 {
-	int dswpwrok_in = gpio_get_level(GPIO_PG_EC_DSW_PWROK);
+	int dswpwrok_in = intel_x86_get_pg_ec_dsw_pwrok();
 	static int dswpwrok_out = -1;
 	int all_sys_pwrgd_in;
 	int all_sys_pwrgd_out;
@@ -189,7 +199,7 @@ enum power_state power_handle_state(enum power_state state)
 			break;
 
 		/* Pass thru DSWPWROK again since we changed it. */
-		dswpwrok_in = gpio_get_level(GPIO_PG_EC_DSW_PWROK);
+		dswpwrok_in = intel_x86_get_pg_ec_dsw_pwrok();
 		/*
 		 * A minimum 10 msec delay is required between PP3300_A being
 		 * stable and the DSW_PWROK signal being passed to the PCH.
@@ -230,7 +240,7 @@ enum power_state power_handle_state(enum power_state state)
 		 * needs to be changed. If it's low->high transition, call board
 		 * specific handling if provided.
 		 */
-		all_sys_pwrgd_in = gpio_get_level(GPIO_PG_EC_ALL_SYS_PWRGD);
+		all_sys_pwrgd_in = intel_x86_get_pg_ec_all_sys_pwrgd();
 		all_sys_pwrgd_out = gpio_get_level(GPIO_PCH_SYS_PWROK);
 
 		if (all_sys_pwrgd_in != all_sys_pwrgd_out) {
diff --git a/power/intel_x86.h b/power/intel_x86.h
index 3f4d8ff6f0..52accead32 100644
--- a/power/intel_x86.h
+++ b/power/intel_x86.h
@@ -75,4 +75,20 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state);
  */
 enum ec_error_list intel_x86_wait_power_up_ok(void);
 
+/**
+ * Get the value of PG_EC_DSW_PWROK.
+ *
+ * The default implementation is just to return the GPIO.  But if a
+ * board doesn't have that GPIO, they may override this function.
+ */
+__override_proto int intel_x86_get_pg_ec_dsw_pwrok(void);
+
+/**
+ * Get the value of PG_EC_ALL_SYS_PWRGD.
+ *
+ * The default implementation is just to return the GPIO.  But if a
+ * board doesn't have that GPIO, they may override this function.
+ */
+__override_proto int intel_x86_get_pg_ec_all_sys_pwrgd(void);
+
 #endif /* __CROS_EC_INTEL_X86_H */