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author | Robert Zieba <robertzieba@google.com> | 2022-10-24 16:21:58 -0600 |
---|---|---|
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-12-09 16:53:42 +0000 |
commit | 2be2df7a1cc61699b86d88355d72edcd8ad40def (patch) | |
tree | c931b2a8b988cbaf9c97cd2ee4210c3883b84c0a /power | |
parent | 885597319921a702608b5261fdd97b551a21d16d (diff) | |
download | chrome-ec-2be2df7a1cc61699b86d88355d72edcd8ad40def.tar.gz |
power/amd_x86: Add support for external prochot interrupts
This commit adds support for external prochot interrupts to AMD specific
x86 power code.
BRANCH=none
BUG=b:227768313
TEST=Ran on skyrim device
LOW_COVERAGE_REASON=No AMD x86 power emulator
Change-Id: I9154734c102dd9117f13004d9bce6e3f53409c5d
Signed-off-by: Robert Zieba <robertzieba@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3975225
Reviewed-by: Diana Z <dzigterman@chromium.org>
Diffstat (limited to 'power')
-rw-r--r-- | power/amd_x86.c | 25 |
1 files changed, 23 insertions, 2 deletions
diff --git a/power/amd_x86.c b/power/amd_x86.c index ca40ef9f3b..7a215a3e21 100644 --- a/power/amd_x86.c +++ b/power/amd_x86.c @@ -89,8 +89,29 @@ void chipset_throttle_cpu(int throttle) if (IS_ENABLED(CONFIG_CPU_PROCHOT_ACTIVE_LOW)) throttle = !throttle; - if (chipset_in_state(CHIPSET_STATE_ON)) - gpio_set_level(GPIO_CPU_PROCHOT, throttle); + if (!chipset_in_state(CHIPSET_STATE_ON)) + return; + + if (IS_ENABLED(CONFIG_THROTTLE_AP_INTERRUPT_SINGLE)) { + if (throttle == IS_ENABLED(CONFIG_CPU_PROCHOT_ACTIVE_LOW)) { + /* Enable interrupt if we're not throttling the AP */ + gpio_set_flags(GPIO_CPU_PROCHOT, GPIO_INPUT); + gpio_enable_interrupt(GPIO_CPU_PROCHOT); + + if ((!gpio_get_level(GPIO_CPU_PROCHOT)) == + IS_ENABLED(CONFIG_CPU_PROCHOT_ACTIVE_LOW)) { + CPRINTS("External prochot during throttling"); + } + return; + } + + /* Otherwise restore our original GPIO settings */ + gpio_disable_interrupt(GPIO_CPU_PROCHOT); + gpio_set_flags(GPIO_CPU_PROCHOT, + gpio_get_default_flags(GPIO_CPU_PROCHOT)); + } + + gpio_set_level(GPIO_CPU_PROCHOT, throttle); } void chipset_handle_espi_reset_assert(void) |