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authorNicolas Boichat <drinkcat@chromium.org>2019-02-27 08:27:27 +0800
committerchrome-bot <chrome-bot@chromium.org>2019-02-27 04:59:04 -0800
commitedf3c100bb09c60b813170de322c74c32f68b0b5 (patch)
tree53d160dfdedf2ab4bb09b0e20f715c7e71e7d0d1 /power
parent5a7600276d9f2a5eafb87a348f305e875f7e4382 (diff)
downloadchrome-ec-edf3c100bb09c60b813170de322c74c32f68b0b5.tar.gz
power/mt8183: Do not react to watchdog interrupt if PMIC is off
When the PMIC is shut down, the watchdog line will naturally fall as well. From measurements, this takes about 70ms+, so the EC will have enough time to do the power sequencing and mask watchdog interrupts, unless something exceptional happens. The exceptional case is easy to handle anyway, so let's do that. BRANCH=none BUG=b:124474520 TEST=With msleep(10) in power_handle_state and printout in the else branch of chipset_watchdog_interrupt => AP poweroff does not cause a watchdog reset. TEST=stop daisydog; echo > /dev/watchdog => system resets after a few seconds Change-Id: I532b1968abb90bd9e96856020faf16080fe67af3 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1490793 Reviewed-by: Yilun Lin <yllin@chromium.org>
Diffstat (limited to 'power')
-rw-r--r--power/mt8183.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/power/mt8183.c b/power/mt8183.c
index 9b823a0a8a..4904da3fb9 100644
--- a/power/mt8183.c
+++ b/power/mt8183.c
@@ -118,16 +118,21 @@ void chipset_reset_request_interrupt(enum gpio_signal signal)
/*
* Triggers on falling edge of AP watchdog line only. The falling edge can
- * happen in these 2 cases:
+ * happen in these 3 cases:
* - AP asserts watchdog while the AP is on: this is a real AP-initiated reset.
* - EC asserted GPIO_AP_SYS_RST_L, so the AP is in reset and AP watchdog falls
* as well. This is _not_ a watchdog reset. We mask these cases by disabling
* the interrupt just before shutting down the AP, and re-enabling it just
* after starting the AP.
+ * - PMIC has shut down (e.g. the AP powered off by itself), this is not a
+ * watchdog reset either. This should be covered by the case above if the
+ * EC reacts quickly enough, but we mask those cases as well by testing if
+ * the PMIC is still on when the watchdog line falls.
*/
void chipset_watchdog_interrupt(enum gpio_signal signal)
{
- chipset_reset(CHIPSET_RESET_AP_WATCHDOG);
+ if (power_get_signals() & IN_PGOOD_PMIC)
+ chipset_reset(CHIPSET_RESET_AP_WATCHDOG);
}
void chipset_force_shutdown(enum chipset_shutdown_reason reason)