diff options
| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2019-10-02 14:27:47 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2019-11-01 18:43:42 +0000 |
| commit | 9577704f30c7e824c0590264df22d95a2c706575 (patch) | |
| tree | 566b5beeeae8b343803718101ba0b00c940506cb /test/test_config.h | |
| parent | e8121e83e478fef2d5a29304be900311f3f020c4 (diff) | |
| download | chrome-ec-9577704f30c7e824c0590264df22d95a2c706575.tar.gz | |
Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT
Certain SKUs of certain boards have lesser number of USB PD ports than
defined by CONFIG_USB_PD_PORT_COUNT. Hence rename
CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT.
BUG=b:140816510, b:143196487
BRANCH=octopus
TEST=make -j buildall; Boot to ChromeOS
Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'test/test_config.h')
| -rw-r--r-- | test/test_config.h | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/test/test_config.h b/test/test_config.h index 30a82ba863..8a947d1717 100644 --- a/test/test_config.h +++ b/test/test_config.h @@ -232,7 +232,7 @@ int ncp15wb_calculate_temp(uint16_t adc); #ifdef TEST_USB_COMMON #define CONFIG_USB_POWER_DELIVERY -#define CONFIG_USB_PD_PORT_COUNT 1 +#define CONFIG_USB_PD_PORT_MAX_COUNT 1 #define CONFIG_USB_PD_TCPC #define CONFIG_USB_PD_TCPM_STUB #define CONFIG_SHA256 @@ -240,7 +240,7 @@ int ncp15wb_calculate_temp(uint16_t adc); #endif #if defined(TEST_USB_SM_FRAMEWORK_H3) -#define CONFIG_USB_PD_PORT_COUNT 1 +#define CONFIG_USB_PD_PORT_MAX_COUNT 1 #undef CONFIG_USB_PRL_SM #undef CONFIG_USB_PE_SM #undef CONFIG_USB_TYPEC_SM @@ -248,7 +248,7 @@ int ncp15wb_calculate_temp(uint16_t adc); #endif #if defined(TEST_USB_SM_FRAMEWORK_H2) -#define CONFIG_USB_PD_PORT_COUNT 1 +#define CONFIG_USB_PD_PORT_MAX_COUNT 1 #undef CONFIG_USB_PRL_SM #undef CONFIG_USB_PE_SM #undef CONFIG_USB_TYPEC_SM @@ -256,7 +256,7 @@ int ncp15wb_calculate_temp(uint16_t adc); #endif #if defined(TEST_USB_SM_FRAMEWORK_H1) -#define CONFIG_USB_PD_PORT_COUNT 1 +#define CONFIG_USB_PD_PORT_MAX_COUNT 1 #undef CONFIG_USB_PRL_SM #undef CONFIG_USB_PE_SM #undef CONFIG_USB_TYPEC_SM @@ -264,7 +264,7 @@ int ncp15wb_calculate_temp(uint16_t adc); #endif #if defined(TEST_USB_SM_FRAMEWORK_H0) -#define CONFIG_USB_PD_PORT_COUNT 1 +#define CONFIG_USB_PD_PORT_MAX_COUNT 1 #undef CONFIG_USB_PRL_SM #undef CONFIG_USB_PE_SM #undef CONFIG_USB_TYPEC_SM @@ -272,7 +272,7 @@ int ncp15wb_calculate_temp(uint16_t adc); #endif #if defined(TEST_USB_PRL) -#define CONFIG_USB_PD_PORT_COUNT 2 +#define CONFIG_USB_PD_PORT_MAX_COUNT 2 #define CONFIG_USB_SM_FRAMEWORK #undef CONFIG_USB_PE_SM #undef CONFIG_USB_TYPEC_SM @@ -286,7 +286,7 @@ int ncp15wb_calculate_temp(uint16_t adc); #if defined(TEST_USB_PE_DRP) #define CONFIG_TEST_USB_PE_SM -#define CONFIG_USB_PD_PORT_COUNT 1 +#define CONFIG_USB_PD_PORT_MAX_COUNT 1 #define CONFIG_USB_PE_SM #define CONFIG_USB_PID 0x5036 #define CONFIG_USB_POWER_DELIVERY @@ -311,7 +311,7 @@ int ncp15wb_calculate_temp(uint16_t adc); /* GND impedance in milliohms */ #define VPD_GND_IMPEDANCE 33 -#define CONFIG_USB_PD_PORT_COUNT 1 +#define CONFIG_USB_PD_PORT_MAX_COUNT 1 #define CONFIG_USB_SM_FRAMEWORK #define CONFIG_USB_PE_SM #define CONFIG_USB_PRL_SM @@ -336,7 +336,7 @@ int ncp15wb_calculate_temp(uint16_t adc); #define CONFIG_USB_PD_TRY_SRC #define CONFIG_USB_TYPEC_SM #define CONFIG_USB_SM_FRAMEWORK -#define CONFIG_USB_PD_PORT_COUNT 1 +#define CONFIG_USB_PD_PORT_MAX_COUNT 1 #define CONFIG_USBC_SS_MUX #define CONFIG_USB_PD_VBUS_DETECT_TCPC #define CONFIG_USB_POWER_DELIVERY @@ -348,7 +348,7 @@ int ncp15wb_calculate_temp(uint16_t adc); defined(TEST_USB_PD_REV30) #define CONFIG_USB_POWER_DELIVERY #define CONFIG_USB_PD_DUAL_ROLE -#define CONFIG_USB_PD_PORT_COUNT 2 +#define CONFIG_USB_PD_PORT_MAX_COUNT 2 #define CONFIG_USB_PD_TCPC #define CONFIG_USB_PD_TCPM_STUB #define CONFIG_SHA256 @@ -363,7 +363,7 @@ int ncp15wb_calculate_temp(uint16_t adc); #endif /* TEST_USB_PD || TEST_USB_PD_GIVEBACK || TEST_USB_PD_REV30 */ #ifdef TEST_USB_PPC -#define CONFIG_USB_PD_PORT_COUNT 1 +#define CONFIG_USB_PD_PORT_MAX_COUNT 1 #define CONFIG_USB_PD_VBUS_DETECT_PPC #define CONFIG_USBC_PPC #define CONFIG_USBC_PPC_POLARITY @@ -374,7 +374,7 @@ int ncp15wb_calculate_temp(uint16_t adc); #if defined(TEST_CHARGE_MANAGER) || defined(TEST_CHARGE_MANAGER_DRP_CHARGING) #define CONFIG_CHARGE_MANAGER #define CONFIG_USB_PD_DUAL_ROLE -#define CONFIG_USB_PD_PORT_COUNT 2 +#define CONFIG_USB_PD_PORT_MAX_COUNT 2 #define CONFIG_BATTERY #define CONFIG_BATTERY_SMART #define CONFIG_I2C @@ -390,7 +390,7 @@ int ncp15wb_calculate_temp(uint16_t adc); #ifdef TEST_CHARGE_RAMP #define CONFIG_CHARGE_RAMP_SW -#define CONFIG_USB_PD_PORT_COUNT 2 +#define CONFIG_USB_PD_PORT_MAX_COUNT 2 #endif #if defined(TEST_NVMEM) || defined(TEST_NVMEM_VARS) |