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author | Diana Z <dzigterman@chromium.org> | 2021-11-11 11:19:08 -0700 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-11-11 21:41:33 +0000 |
commit | 3ce436081d301a948767e08f5428b19ca5371003 (patch) | |
tree | 32de6c4f670f25a06f35d63f3f332df8a64d99db /test | |
parent | 011b2680db04dbd2e82859c698accc76b4d275ea (diff) | |
download | chrome-ec-3ce436081d301a948767e08f5428b19ca5371003.tar.gz |
TC DRP Test: Add LPM config
Nearly every board uses LPM with its TCPCs, so configure this for our
TC DRP unit test as well.
BRANCH=None
BUG=b:195393479
TEST=make -j run-usb_typec_drp_acc_trysrc
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ic53074aad299cd350a8f8a52cf87edaf2ebdce94
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3276663
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Diffstat (limited to 'test')
-rw-r--r-- | test/test_config.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/test/test_config.h b/test/test_config.h index 2a0aa5e77e..8383ce005e 100644 --- a/test/test_config.h +++ b/test/test_config.h @@ -496,7 +496,11 @@ int ncp15wb_calculate_temp(uint16_t adc); #define CONFIG_USB_PD_PORT_MAX_COUNT 1 #define CONFIG_USBC_SS_MUX #define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE +#define CONFIG_USB_PD_TCPC_LOW_POWER #define CONFIG_USB_PD_VBUS_DETECT_TCPC +/* Since we have no real HW to wait on, use a minimal debounce */ +#undef CONFIG_USB_PD_TCPC_LPM_EXIT_DEBOUNCE +#define CONFIG_USB_PD_TCPC_LPM_EXIT_DEBOUNCE 1 #define CONFIG_USB_POWER_DELIVERY #undef CONFIG_USB_PRL_SM #undef CONFIG_USB_PE_SM |